- WDC 65C02
The
Western Design Center WDC 65C02microprocessor is an upgradedCMOS version of the popular NMOS-basedMOS Technology 6502 8-bit CPU — the CMOS redesign being made byBill Mensch of the Western Design Center (WDC). Over various periods of time, the 65C02 has beensecond-source d by NCR, GTE, Rockwell,Synertek andSanyo .Introduction and features
The W65C02S is a low-power general-purpose
8-bit microprocessor (8-bit registers anddata bus ) with a16-bit program counter andaddress bus . It is a fully static core which allows the primary clock to be slowed down indefinitely or fully stopped in either the high or low state. The variable lengthinstruction set and manually optimized core size are intended to make the W65C02S be well suited for low power system-on-chip (SoC) designs.WDC makes a
Verilog hardware description model available for designing the 65C02 core into ASICs and FPGAs. As is common in the semiconductor industry, the company also provides a development system, which includes a developer board, anin-circuit emulator (ICE) and a software development system.General logic features
* 8-bit
data bus
* 16-bitaddress bus (providing an address space of 64K bytes)
* 8-bitarithmetic logic unit (ALU)
* 8-bitprocessor register s:
**accumulator
**stack pointer
**index register s
**status register
* 16-bitprogram counter
* 69 instructions, implemented by 212 operation codes
* 16addressing mode s, includingzero page addressingLogic specifics
* Vector Pull (VPB) output indicates when
interrupt vector s are being addressed
* WAit-for-Interrupt (WAI) and SToP (STP) instructions reduce power consumption, decreaseinterrupt latency and enable synchronization with external eventsElectrical features
* Operating
voltage range specified at 1.8/2.5/3.0/3.3/5.0 V ±5%
* Power consumption of 150uA @ 1 MHz
* Variable length instruction set, enabling code size optimization over fixed length instruction set processors, which also results in power savings
* Fully static circuitry allows stopping the clock to conserve powerComparison with the MOS 6502
Instruction set
The 65C02 shares its predecessor's 8-bit instruction set architecture and 16-bit memory addressing, but adds a number of improvements and documented
opcode s, the most useful being instructions that can push or pull the .X and .Yindex register s to/from the stack. Undefined opcodes have been converted intoNOP s, although of varying instruction lengths.Significantly, the defective "indirect jump page wrap" instruction (JMP (
) , wherestraddles a memory page boundary) has been fixed, eliminating a constant source of trouble for unwaryassembly language programmers. This instruction has also been enhanced with .Xregister indexing , making it possible to code JMP (,X) , enabling the development of a simplejump table management methodology.Some variants of the 65C02 (including the WDC W65C02S and the
Rockwell R65C00 family) feature individualbit manipulation operations (RMB, SMB, BBR and BBS). The 65SC02 was also available, which lacked these operations.tatus register
Other problems with the 6502, fixed in the 65C02, relate to its program
status register , which contains eight system flags. Some flags are set or reset under program control. Others reflect the status of the machine afterarithmetic orbit manipulation instructions.In all
NMOS logic forms of the 6502, the decimal flag (D flag) is not initialized to a known state following reset or when aninterrupt is processed, which may lead to arbitrary behavior. This forces 6502 programmers to use the CLD instruction early in the reset handler code (it is generally the second instruction executed after SEI), as well as in the front end of theinterrupt handler . The 65C02 addresses these problems by causing the D flag to be cleared at reset or upon receipt of an interrupt (after thestatus register is push on to the stack).Also, in NMOS 6502s, the N flag is invalid when the processor is operating in decimal mode. The 65C02 fixes this problem (at the cost of an additional clock cycle), and thus increases the usefulness of decimal mode.
Notable uses of the 65C02
Home computers
*
Apple IIc portable improvedApple II , byApple Computer
* Apple Enhanced IIe by Apple Computer
*BBC Master home/educational computer, byAcorn Computers Ltd (65SC12 plus optional 65C102)
*Replica I by Briel Computers, a replica of theApple I hobbyist computerVideo game consoles
*
Atari Lynx handheld (65SC02 @ 4 MHz)
*TurboGrafx-16 aka PC Engine (HuC6280 @ 1.78 MHz and 7.16 MHz), by NEC
*GameKing handhelds (6 MHz), byTime Top
*Watara Supervision handhelds (65SC02 @ 4 MHz)Other products
*
TurboMaster accelerator cartridge for theCommodore 64 home computer (65C02 @ 4.09 MHz)
*mephisto MMV chess computer (4–20 MHz)External links
* [http://www.65xx.com/wdc/w65c02s-chip.cfm W65C02S 8–bit Microprocessor] – Resource page at WDC's 65xx.com website
* [http://axis.llx.com/~nparker/a2/opcodes.html The 6502/65C02/65C816 Instruction Set Decoded] – From Neil Parker's Apple II page
* [http://www.cpu-world.com/info/6502/65xx_65Cxx_65SCxx_differences.html CPU World]
Wikimedia Foundation. 2010.