DEC 2000 AXP

The DEC 2000 AXP or DECpc AXP 150 is a series of entry level server and workstation computers respectively, developed and manufactured by Digital Equipment Corporation. Launched on October 28, 1992, the DECpc AXP 150 was the first Alpha AXP based system to support the Windows NT operating system. The DEC 2000 AXP also supported Digital's OpenVMS AXP and OSF/1 AXP (later renamed to Digital UNIX) operating systems.

The charter for the development and production of the DEC 2000 AXP was held by Digital's Entry Level Solutions Business, based in Ayr, Scotland. Workstation variants of these systems were later succeeded by the entry-level Multia and the entry-level and mid-range models of the AlphaStation family, while sever variants were succeeded by entry-level models of the AlphaServer family.

Models

There are three models in the DEC 2000 AXP family:
* DECpc AXP 150, codenamed "Jensen", marketed as a Windows NT workstation. It was discontinued on February 28, 1994.
* Model 300, codenamed "Jensen", identical to the DECpc AXP 150 but intended for use as a server. Some options available for the DECpc AXP 150 are not available for the Model 300. It was discontinued on February 28, 1994.
* Model 500, codenamed "Culzean", marketed as a server running either Windows NT Advanced Server, DEC OSF/1 AXP or OpenVMS. The Model 500 was similar to the Model 300, but housed in a larger pedestal-type enclosure capable with space for up to 12 3.5 in hard disks and incorporating an Intelligent Front Panel (IFP) for system monitoring and control. The Model 500 also supported either two 415 W power supplies or one power supply plus a battery Standby Power Supply (SPS). It was discontinued on December 30, 1994.

The DECpc AXP 150 running Windows NT was intended to be used as a workstation and therefore can only use a VGA monitor. The Model 300 and 500, intended to be used as servers running OpenVMS or DEC OSF/1 AXP can only use a VT-series terminal or equivalent.

Description

The DEC 2000 AXP systems used a 150 MHz DECchip 21064 microprocessor with an external 512 KB [When applied to computer memory (RAM or cache) the quantities KB, MB and GB are defined as:
*1 KB = 1024 B
*1 MB = 1024 KB
*1 GB = 1024 MB, consistent with the JEDEC memory standard.] B-cache (L2 cache), which is implemented with 17 nanosecond SRAMs located on the motherboard.

The DEC 2000 AXP has a 128-bit memory subsystem and supports 16 to 128 MB of memory. Standard 36-bit, 70 nanosecond SIMMs with longword parity protection are used to populate eight SIMM slots, which are organised in two banks of four slots each. The DEC 2000 AXP supports two memory options, a 16 MB (4 × 4 MB SIMMs) and a 64 MB (4 × 16 MB SIMMs) memory kit.

The DEC 2000 AXP provides six EISA slots for expansion. Pre-installed EISA cards typically comprised a Compaq QVision VGA adapter, Adaptec AHA-1742 SCSI host adapter, and a DEC DE422 Ethernet adapter.

Unlike other similar Alpha systems from Digital at the time, such as the DEC 3000 AXP, the DEC 2000 AXP used the EISA bus for expansion instead of the TURBOchannel interconnect. The decision to use the EISA bus was due to cost requirements. The EISA bus was an industry standard bus, and there were more vendors offering EISA options, in addition to EISA chipsets. In contrast, the TURBOchannel bus, while offering higher performance, would have required more expensive ASICs to implement like the DEC 3000 AXP, and would have reduced the number of third-party options available.

Because the DECchip 21064's signalling is incompatible with the EISA chipset and the system peripherals, the DECchip signals are interfaced to two buses, an address and command bus and a 32-bit data bus that masquerades as the 80486 interfaces. These two buses are referred to as "pseudo-486". The EISA bus itself was implemented by a subset of the Intel 82350DT chipset. The 82358 EBC (EISA Bus Controller) chip and 82357 ISP (Integrated System Peripheral) chip implements the EISA bus and provides it with an interface to the system. Two 82352 EBB (EISA Bus Buffer) chips are also present, with one used to interface the EISA bus to a 32-bit pseudo-486 data bus, and the other used to interface the EISA bus to a pseudo-486 address and command bus.

This arrangement of buffering and converting buses and control signals resulted in an inefficient I/O subsystem and as a result, the EISA bus only achieved a peak bandwidth of 25 MB/s (compared to 33 MB/s in standard PCs).

A VLSI Technologies VL82C106 combination chip, connected to the pseudo-486 buses, contains the real time clock and 66 bytes of battery-backed RAM, in addition to two serial line interfaces, a LPT interface and two PS/2 port interfaces. The real time clock and the battery-backed RAM draws power from an external 4.5 volt battery pack. The battery-backed RAM was primarily used to store system configuration information.

References

* [http://vt100.net/mirror/mds-199909/cd1/alpha/a0636tm1.pdf DECpc AXP 150 and DEC 2000 Model 300 AXP Customer Technical Information, EK-A0636-TM.001, July 1993, Digital Equipment Corporation.]
* [http://vt100.net/mirror/mds-199909/cd1/alpha/a0634om1.pdf DECpc AXP 150 and DEC 2000 Model 300 AXP User Information, EK-A0634-OM.001, July 1993, Digital Equipment Corporation.]
* [http://vt100.net/mirror/mds-199909/cd1/alpha/a0675om1.pdf DEC 2000 Model 500 AXP User Information, EK-A0675-OM.001, January 1994, Digital Equipment Corporation.]
* [http://vt100.net/mirror/mds-199909/cd1/alpha/a0676tm1.pdf DEC 2000 Model 500 AXP Customer Technical Information, EK-A0676-TM.001, January 1994, Digital Equipment Corporation.]
* [ftp://ftp.netbsd.org/pub/NetBSD/misc/dec-docs/ek-a0638-td.pdf.gz PB22H-KB System Module Hardware Reference Information, EK-A0638-TD.001, 14 July, 1993, Digital Equipment Corporation.]
* [http://www.hpl.hp.com/hpjournal/dtj/vol6num1/vol6num1art4.pdf David G. Conroy, Thomas E. Kopec, and Joseph R. Falcone (1994), "The Evolution of the Alpha AXP PC", "Digital Technical Journal" 6(1).]

Notes