- Intel 8080
Infobox Computer Hardware Cpu
name = Intel 8080
caption = An Intel C8080A processor.
produced-start = mid 1974
slowest = 2 | slow-unit = MHz
fastest = | fast-unit = MHz
arch = pre
pack1 = 40 pin DIPThe Intel 8080 was an early
microprocessordesigned and manufactured by Intel. The 8-bitCPU was released in April 1974 running at 2 MHz (at up to 500,000 instructions per second), and is generally considered to be the first truly usable microprocessorCPU design. It was implemented in NMOS.
The Intel 8080 was the successor to the
Intel 8008; this was due to its being assembly languagesource compatiblevague|date=March 2008, since it used the same instruction setdeveloped by Computer Terminal Corporation. The 8080's large 40 pin DIP packaging permitted it to provide a 16-bit address busand an 8-bit data bus, allowing easy access to 64 kilobytes of memory.
The processor had seven 8-bit registers, (A, B, C, D, E, H, and L) where A was the 8-bit accumulator and the other six could be used as either byte-registers or as three 16-bit register pairs (BC, DE, HL) depending on the particular instruction. Some instructions also enabled HL to be used as (a limited) 16-bit accumulator. It also had a 16-bit stack pointer to memory (replacing the 8008's internal stack), and a 16-bit
Most of the 8-bit operations were possible between the accumulator and either one of the registers or the memory cell, indexed by the 16-bit value of the register pair HL. Moving operations were supported between any two registers, or between any register and the HL-indexed memory cell. Due to the highly regular machine code format for MOV commands, the opcodes included those for moving a byte from a given register into the same register (MOV A,A , for instance). These commands were seldom used, however, unless programmed delays were needed. What would have been instruction to move from the HL-indexed memory cell into the same memory cell (i.e., MOV M,M) instead was
HLT(for halt). HLThalted the processor until external reset or interrupt signals were received.
All processor commands were coded by one byte, but some of them were followed by one or two bytes of data, a memory address, or a port number. The register-to-register data-move commands were all coded by one byte, making up about a quarter of the commands in the processor-command system. The processor had eight one-byte commands to call the subroutines located at the fixed addresses 0000h, 0008h, 0010h, ... 0038h (RST). These commands were frequently used in the interrupt-handling or system-library calls.
The most sophisticated command (and the longest to execute) was XTHL, which was used for exchanging the register pair HL with the value stored at the address indicated by the stack pointer.
Although the 8080 was generally an 8-bit processor, it also had limited abilities to perform 16-bit operations: Any one of the three 16-bit register pairs (BC, DE, HL) could be loaded with an immediate 16-bit value (using LXI), incremented or decremented (using INX and DCX), or added to HL (using DAD). The XCHNG operation exchanged the values of HL and DE. By adding HL to itself, it was possible to achieve the same result as a 16-bit arithmetical left shift with one instruction.
The only 16 bit instructions that affect any flag is DAD, which sets the CY (carry) flag.
Input output port space
The 8080 supported up to 256
input/output(I/O) ports, accessed via dedicated I/O instructions—taking port addresses as operands. This I/O mapping scheme was regarded as an advantage as it freed up the processor's limited address space. Many CPU architectures instead use a common address space without the need for dedicated I/O instructions, although a drawback in such designs may be that special hardware must be used to insert wait states as peripherals are often slower than memory. However, in some simple 8080 computers, I/O was indeed addressed as if they were memory cells, "memory mapped", leaving the I/O commands unused. I/O addressing could also sometimes employ the fact that the processor would output the same 8-bit port address at to both the lower and the higher address byte (i.e. IN 05h would put the address 0505h on the 16-bit address bus). Similar I/O-port schemes was used in the backward compatible Zilog Z80 and Intel 8085 as well as in the closely related x86 families of microprocessors.
eparate stack space
One of the bits in the processor state word (see below) was indicating that the processor is accessing data from the stack. Using this signal, it was possible to implement a separate stack memory space. However this feature was seldom used.
The internal state word
For more advanced systems, during one phase of its working loop the processor set its "internal state byte" on the data bus. This byte contains flags which indicate whether the memory or I/O port is accessed and whether it was necessary to handle an interrupt.
The interrupt system state (enabled or disabled) was also output on a separate pin. For simple systems, where the interrupts were not used, it is possible to find cases where this pin is used as an additional single-bit output port (the popular Radio86RK computer made in USSR, for instance).
The address bus had its own 16 pins, and the data bus had 8 pins that were possible to use without any multiplexing. Using the two additional pins (read and write signals), it was possible to assemble simple microprocessor devices very easily. Only the separate IO space, interrupts and DMA required additional chips to decode the processor pin signals. However the processor load capacity was limited, and even simple computers frequently contained bus amplifiers.
The processor required three power sources (-5, +5 and +12 Volt(V)) and two non-interlacing high-amplitude synchronization signals. However at least the late Soviet version КР580ВМ80А was able to work with a single +5 V power source, the +12 V pin being connected to +5 V and the -5 V pin to ground. The processor consumed about 1.3 watts (W) of power.
The pinout table, from the chip's accompanying documentation, described the pins as follows:
Pin number Signal Type Comment 1 A10 Output Address bus 10 2 GND - Ground 3 D4 Bidirectional Bidirectional data bus. The processor also transiently sets here the "processor state", providing information that the processor is currently doing:
*D0 reading interrupt command. In response to the interrupt signal, the processor was reading and executing a single arbitrary command with this flag raised. Normally the supporting chips provided the subroutine call command (CALL or RST), transferring control to the interrupt handling code.
*D1 reading (low level means writing)
*D2 accessing stack (probably a separate stack memory space was initially planned)
*D3 doing nothing, has been halted by the
*D4 writing data to an output port
*D5 reading the first byte of an executable command
*D6 reading data from an input port
*D7 reading data from memory
4 D5 5 D6 6 D7 7 D3 8 D2 9 D1 10 D0 11 -5 V - The -5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged. 12 R Input Reset. The signal forces execution of commands, located at address 0000. The content of other processor registers is not modified. This is an inverting input (the active level being logical 0) 13 DMA Input Direct memory access request. The processor is requested to switch the data and address bus to the high impedance ("disconnected") state. 14 INT Input Interrupt request 15 CLC2 Input The second phase of the clock generator signal 16 ACK INT Output The processor had two commands for setting 0 or 1 level on this pin. The pin normally was supposed to be used for interrupt control. However in simple computers it was sometimes used as a single bit output port for various purposes. 17 RD Output Read (the processor reads from memory or input port) 18 WR Output Write (the processor writes to memory or output port). This is an inverted output, the active level being logical zero. 19 S Output Active level indicates that the processor has put the "state word" on the data bus. The various bits of this state word provide additional information for supporting the separate address and memory spaces, interrupts, and direct memory access. This signal is required to pass through additional logic before it can be used to write the processor state word from the data bus into some external register. 20 5 V - The + 5 V power supply 21 ACK DMA Output Direct memory access confirmation. The processor switches data and address pins into the high impedance state, allowing another device to manipulate the bus 22 CLC1 Input The first phase of the clock generator signal 23 RDY Input Wait. With this signal it was possible to suspend the processor's work. It was also used to support the hardware-based step-by step debugging mode. 24 WAIT Output Wait (indicates that the processor is in the waiting state) 25 A0 Output Address bus 26 A1 27 A2 28 12 V - The +12 V power supply. This must be the "last" connected and first disconnected power source. 29 A3 Output The address bus, can switch into high impedance state on demand 30 A4 31 A5 32 A6 33 A7 34 A8 35 A9 36 A15 37 A12 38 A13 39 A14 40 A11
Literature, used for this table:
integrated circuitused enhancement load nMOS gates and was manufactured in a process using a minimum feature size of 6 µm. A single layer of metal was used to interconnect the approximately 6,000 transistors [ [http://museum.reichel-orbital.de/index.php?page=cpus Reichel-Orbital museum - CPU Collection] ] in the design (the higher resistance polysilicon layer required to implement transistor gates was also used for some interconnects). The die size was approximately 20 mm².
The industrial impact
Applications and successors
The 8080 was used in many early microcomputers, such as the MITS Altair 8800 Computer,
Processor Technology SOL-20Terminal Computer and IMSAI 8080Microcomputer, forming the basis for machines running the CP/Moperating system (the later, fully compatible and more capable, Zilog Z80processor would capitalize on this, with Z80 & CP/M becoming the dominant CPU & OS combination of the period much like x86& MS-DOSfor the PC a decade later). The first single-board microcomputer (see the May 1976 issue of Radio-Electronics) called the "dyna-micro" was based on the Intel C8080A, and also used Intel's first EPROM, the C1702A. The dyna-micro was re-branded by E&L Instruments of Derby, CT in 1976 as the "MMD-1" (Mini-Micro Designer 1) and was made famous as the example microcomputer in the very popular 8080 "BugBook" series of the time. One of the early uses of the 8080 was made in the late 1970s by Cubic-Western Data of San Diego, CA in its Automated Fare Collection Systems custom designed for mass transit systems such as BART and others around the world. An early industrial use of the 8080 was as the "brain" of the DatagraphiX Auto-COM (Computer Output Microfiche) line of products which took large amounts of user data from reel-to-reel tape and imaged it onto microfiche. The Auto-COM instruments also included an entire automated film cutting, processing, washing, and drying sub-system - quite a feat, both then and in the 21st century, to all be accomplished successfully with only an 8-bit microprocessor running at a clock speed of less than 1MHz with a 64K byte memory limit. In addition, several early arcade video games were built around the 8080 microprocessor. " Space Invaders" was perhaps the most popular such title.
Shortly after the launch of the 8080, the
Motorola 6800competing design was introduced, and after that, the MOS Technology 6502variation of the 6800. Zilogintroduced the Z80, which had a compatible machine-language instruction set and initially used the same assembly language as the 8080, but for legal reasons, Zilog developed a syntactically-different (but code compatible) alternative assembly language for the Z80. At Intel, the 8080 was followed by the compatible and electrically more elegant 8085, and later by the assembly language compatible 16-bit 8086 and then the 8/16-bit 8088, which was selected by IBMfor its new PC to be launched in 1981. Later NECmade an NEC V20processor (an 8088 clone) which supported 8080 emulation mode. Thus, the 8080, via its ISA, made a lasting impact on computer history.
The Soviet Union manufactured a complete 8080 analog named KP580ИK80 (later marked as KP580BM80), where even the pins were placed identically. This processor was the base of the Radio86RK ( [http://ru.wikipedia.org/wiki/%D0%A0%D0%B0%D0%B4%D0%B8%D0%BE_86%D0%A0%D0%9A Радио 86РК] in Russian), probably the most popular amateur single-board computer in the Soviet Union. Radio86RK's predecessor was the Micro-80 ( [http://ru.wikipedia.org/wiki/%D0%9C%D0%B8%D0%BA%D1%80%D0%BE-80 Микро-80] in Russian), and its successor the Orion-128 ( [http://ru.wikipedia.org/wiki/%D0%9E%D1%80%D0%B8%D0%BE%D0%BD-128 Орион-128] in Russian) which had a graphical display. Both were built on the KP580 processor. According to some sources, the Soviet analog had two undocumented instructions, specific to itself; however, these were not widely known.
Another model compatible with Intel 8080A, named
MMN8080, was produced at Microelectronica Bucharestin Romania[ [http://www.cpu-world.com/info/exUSSR-chips.html CPU-world: Soviet chips and their western analogs ] ] .
The 8080 also changed how computers were created. When the 8080 was introduced, computer systems were usually created by computer manufacturers such as
Digital Equipment Corporation, Hewlett Packard, or IBM. A manufacturer would produce the entire computer, including processor, terminals, and system software such as compilers and operating system. The 8080 was actually designed for just about any application "except" a complete computer system. Hewlett Packard developed the HP 2640series of smart terminals around the 8080. The HP 2647was a terminal which ran BASIC on the 8080. Microsoftwould create the first popular programming language for the 8080, and would later acquire DOSfor the IBM-PC.
As the 8080 evolved into the largely compatible x86 family, PCs evolved into workstations and servers of 16, 32 and 64 bits, with advanced memory protection, segmentation, and multiprocessing features, blurring the difference between small and large computers (the
80286and 80386's protected modewere important in doing so). The size of chips has grown so that the size and power of large x86 chips is not much different from high end architecture chips, and a common strategy to produce a very large computer is to network many x86 processors.
The basic architecture of the 8080 and its successors has replaced many proprietary midrange and mainframe computers, and withstood challenges of technologies such as
RISC. Most computer manufacturers have abandoned producing their own processors below the highest performance points. Though x86 may not be the most elegant, or theoretically most efficient design, the sheer market force of so many dollars going into refining a design has made the x86 family today, and will remain for some time, the dominant processor architecture, even bypassing Intel's attempts to replace it with incompatible architectures such as the iAPX 432 and Itanium.
Federico Fagginwas the originator of the 8080 architecture in early 1972, proposed it to Intel's management and pushed for its implementation. He finally got the permission to develop it six months later. Faggin hired Masatoshi Shimafrom Japan who did the detailed design under his direction. Stan Mazor contributed a couple of instructions to the instruction set.
* US patent reference
number = 4,010,449
y = 1977 | m = 03 | d = 01
Federico Faggin, Masatoshi Shima, Stanley Mazor
title = MOS computer employing a plurality of separate chips
Asteroid 8080 Intelis named as a pun and praise on the name of Intel 8080. [http://cfa-www.harvard.edu/iau/lists/MPNames.html]
* Microsoft's published phone number, 425-882-8080, was chosen because so much early work was on this chip.
* [http://www.cpu-collection.de/?tn=0&l0=cl&l1=8080 Intel and other manufacturers' 8080 CPU images and descriptions at cpu-collection.de]
* [http://www.datasheetarchive.com/search.php?q=8080 Scan of the Intel 8080 data book at datasheetarchive.com]
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