Burroughs large systems instruction set

Burroughs large systems instruction set

The B5000 instruction set is the set of valid operations for the Burroughs large systems including the current (as of 2006) Unisys Clearpath/MCP systems. These unique machines have a distinctive design and instruction set. Each word of data is associated with a type, and the effect of an operation on that word can depend on the type. Further, the machines are stack based to the point that they had no user-addressable registers.

As you would expect from the description of the run-time data structures used in these systems, Burroughs large systems also have an interesting instruction set. There are less than 200 operators, all of which fit into 8-bit "syllables." Many of these operators are polymorphic depending on the kind of data being acted on as given by the tag. If we ignore the powerful string scanning, transfer, and edit operators, the basic set is only about 120 operators. If we remove the operators reserved for the operating system such as MVST and HALT, the set of operators commonly used by user-level programs is less than 100.

Since there are no programmer-addressable registers, most of the register manipulating operations required in other architectures are not needed, nor are variants for performing operations between pairs of registers, since all operations are applied to the top of the stack. This also makes code files very compact, since operators are zero-address and do not need to include the address of registers or memory locations in the code stream.

For example the B5000 has only one ADD operator. Typical architectures require multiple operators for each data type, for example add.i, add.f, add.d, add.l for integer, float, double, and long data types. The architecture only distinguishes single and double precision numbers – integers are just reals with a zero exponent. When one or both of the operands has a tag of 2, a double precision add is performed, otherwise tag 0 indicates single precision. Thus the tag itself is the equivalent of the operator .i, .f, .d, and .l extension. This also means that the code and data can never be mismatched.

Two operators are important in the handling of on-stack data – VALC and NAMC. These are two-bit operators, 00 being VALC, value call, and 01 being NAMC, name call. The following six bits of the syllable provide the address couple. Thus VALC covers syllable values 00 to 3F and NAMC 40 to 7F.

VALC is another polymorphic operator. If it hits a data word, that word is loaded to the top of stack. If it hits an IRW, that is followed, possibly in a chain of IRWs until a data word is found. If a PCW is found, then a function is entered to compute the value and the VALC does not complete until the function returns.

NAMC simply loads the address couple onto the top of the stack as an IRW (with the tag automatically set to 1).

In the following operator explanations remember that A and B are the top two stack registers. Double precision extensions are provided by the X and Y registers; thus the top two double precision operands are given by AX and BY. (Mostly AX and BY is implied by just A and B.)

Arithmetic operators

ADD — Add top two stack operands (B := B + A or BY := BY + AX if double precision)
SUBT — Subtract (B - A)
MULT — Multiply with single or double precision result
MULX — Extended multiply with forced double precision result
DIVD — Divide with real result
IDIV — Divide with integer result
RDIV — Return remainder after division
NTIA — Integerize truncated
NTGR — Integerize rounded
NTGD — Integerize rounded with double precision result
CHSN — Change sign
JOIN — Join two singles to form a double
SPLT — Split a double to form two singles
ICVD — Input convert destructive – convert BCD number to binary (for COBOL)
ICVU — Input convert update – convert BCD number to binary (for COBOL)
SNGL — Set to single precision rounded
SNGT — Set to single precision truncated
XTND — Set to double precision
PACD — Pack destructive
PACU — Pack update
USND — Unpack signed destructive
USNU — Unpack signed update
UABD — Unpack absolute destructive
UABU — Unpack, absolute update
SXSN — Set external sign
ROFF — Read and clear overflow flip flop
RTFF — Read true/false flip flop

Comparison operators

LESS &mdash; Is B < A?
GREQ &mdash; Is B ? A?
GRTR &mdash; Is B > A?
LSEQ &mdash; Is B ? A?
EQUL &mdash; Is B = A?
NEQL &mdash; Is B ? A?
LEQV &mdash; Do B and A have exactly the same bit pattern
SAME &mdash; Same as LEQV, but checking tag as well.

Logical operators

LAND &mdash; Logical and of all bits in operands
LOR &mdash; Logical or of all bits in operands
LNOT &mdash; Logical not of all bits in operands

Branch and call operators

BRUN &mdash; Branch unconditional (offset given by following code syllables)
DBUN &mdash; Dynamic branch unconditional (offset given in top of stack)
BRFL &mdash; Branch if last result false (offset given by following code syllables)
DBFL &mdash; Dynamic branch if last result false (offset given in top of stack)
BRTR &mdash; Branch if last result true (offset given by following code syllables)
DBTR &mdash; Dynamic branch if last result true (offset given in top of stack)
EXIT &mdash; Exit current environment (terminate process)
STBR &mdash; Step and branch (used in loops; operand must be SIW)
ENTR &mdash; Execute a procedure call as given by a tag 7 PCW, resulting in an RCW at D [n] + 1
RETN &mdash; Return from current routine to place given by RCW at D [n] + 1 and remove the stack frame

Bit and field operators

BSET &mdash; Bit set (bit number given by syllable following instruction)
DBST &mdash; Dynamic bit set (bit number given by contents of B)
BRST &mdash; Bit reset (bit number given by syllable following instruction)
DBRS &mdash; Dynamic bit reset (bit number given by contents of B)
ISOL &mdash; Field isolate (field given in syllables following instruction)
DISO &mdash; Dynamic field isolate (field given in top of stack words)
FLTR &mdash; Field transfer (field given in syllables following instruction)
DFTR &mdash; Dynamic field transfer (field given in top of stack words)
INSR &mdash; Field insert (field given in syllables following instruction)
DINS &mdash; Dynamic field insert (field given in top of stack words)
CBON &mdash; Count binary ones in the top of stack word (A or AX)
SCLF &mdash; Scale left
DSLF &mdash; Dynamic scale left
SCRT &mdash; Scale right
DSRT &mdash; Dynamic scale right
SCRS &mdash; Dynamic scale right save
DSRS &mdash; Dynamic scale right save
SCRF &mdash; Scale right final
DSRF &mdash; Dynamic scale right final
SCRR &mdash; Scale right round
DSRR &mdash; Dynamic scale right round

Literal operators

LT48 &mdash; Load following code word onto top of stack
LT16 &mdash; Set top of stack to following 16 bits in code stream
LT8 &mdash; Set top of stack to following code syllable
ZERO &mdash; Shortcut for LT48 0
ONE &mdash; Shortcut for LT48 1

Descriptor operators

INDX &mdash; Index create a pointer (copy descriptor) from a base (MOM) descriptor
NXLN &mdash; Index and load name (resulting in an indexed descriptor)
NXLV &mdash; Index and load value (resulting in a data value)
EVAL &mdash; Evaluate descriptor (follow address chain until data word or another descriptor found)

Stack operators

PUSH &mdash; Push down stack register
DLET &mdash; Pop top of stack
EXCH &mdash; Exchange top two words of stack
RSUP &mdash; Rotate stack up (top three words)
RSDN &mdash; Rotate stack down (top three words)
DUPL &mdash; Duplicate top of stack
MKST &mdash;Mark stack (build a new stack frame resulting in an MSCW on the top,
&mdash; followed by NAMC to load the PCW, then parameter pushes as needed, then ENTR)
IMKS &mdash; Insert an MSCW in the B register.
VALC &mdash; Fetch a value onto the stack as described above
NAMC &mdash; Place an address couple (IRW stack address) onto the stack as described above
STFF &mdash; Convert an IRW as placed by NAMC into an SIRW which references data in another stack.
MVST &mdash; Move to stack (process switch only done in one place in the MCP)

Store operators

STOD &mdash; Store destructive (if the target word has an odd tag throw a memory protect interrupt,
&mdash; store the value in the B register at the memory addressed by the A register.
&mdash; Delete the value off the stack.
STON &mdash; Store non-destructive (Same as STOD but value is not deleted &ndash; handy for F := G := H := J expressions).
OVRD &mdash; Overwrite destructive, STOD ignoring read-only bit (for use in MCP only)
OVRN &mdash; Overwrite non-destructive, STON ignoring read-only bit (for use in MCP only)

Load operators

LOAD &mdash; Load the value given by the address (tag 5 or tag 1 word) on the top of stack.
&mdash; Follow an address chain if necessary.
LODT &mdash; Load transparent &ndash; load the word referenced by the address on the top of stack

Transfer operators

These were used for string transfers usually until a certain character was detected in the source string.All these operators are protected from buffer overflows by being limited by the bounds in the descriptors.

TWFD &mdash; Transfer while false, destructive (forget pointer)
TWFU &mdash; Transfer while false, update (leave pointer at end of transfer for further transfers)
TWTD &mdash; Transfer while true, destructive
TWTU &mdash; Transfer while true, update
TWSD &mdash; Transfer words, destructive
TWSU &mdash; Transfer words, update
TWOD &mdash; Transfer words, overwrite destructive
TWOU &mdash; Transfer words, overwrite update
TRNS &mdash; Translate &ndash; transfer a source buffer into a destination converting characters as given in a translate table.
TLSD &mdash; Transfer while less, destructive
TLSU &mdash; Transfer while less, update
TGED &mdash; Transfer while greater or equal, destructive
TGEU &mdash; Transfer while greater or equal, update
TGTD &mdash; Transfer while greater, destructive
TGTU &mdash; Transfer while greater, update
TLED &mdash; Transfer while less or equal, destructive
TLEU &mdash; Transfer while less or equal, update
TEQD &mdash; Transfer while equal, destructive
TEQU &mdash; Transfer while equal, update
TNED &mdash; Transfer while not equal, destructive
TNEU &mdash; Transfer while not equal, update
TUND &mdash; Transfer unconditional, destructive
TUNU &mdash; Transfer unconditional, update

Scan operators

These were used for scanning strings useful in writing compilers.All these operators are protected from buffer overflows by being limited by the bounds in the descriptors.

SWFD &mdash; Scan while false, destructive
SISO &mdash; String isolate
SWTD &mdash; Scan while true, destructive
SWTU &mdash; Scan while true, update
SLSD &mdash; Scan while less, destructive
SLSU &mdash; Scan while less, update
SGED &mdash; Scan while greater or equal, destructive
SGEU &mdash; Scan while greater or equal, update
SGTD &mdash; Scan while greater, destructive
SGTU &mdash; Scan while greater, update
SLED &mdash; Scan while less or equal, destructive
SLEU &mdash; Scan while less or equal, update
SEQD &mdash; Scan while equal, destructive
SEQU &mdash; Scan while equal, update
SNED &mdash; Scan while not equal, destructive
SNEU &mdash; Scan while not equal, update

CLSD &mdash; Compare characters less, destructive
CLSU &mdash; Compare characters less, update
CGED &mdash; Compare characters greater or equal, destructive
CGEU &mdash; Compare characters greater or equal, update
CGTD &mdash; Compare character greater, destructive
CGTU &mdash; Compare character greater, update
CLED &mdash; Compare characters less or equal, destructive
CLEU &mdash; Compare characters less or equal, update
CEQD &mdash; Compare character equal, destructive
CEQU &mdash; Compare character equal, update
CNED &mdash; Compare characters not equal, destructive
CNEU &mdash; Compare characters not equal, update


SINT &mdash; Set interval timer
EEXI &mdash; Enable external interrupts
DEXI &mdash; Disable external interrupts
SCNI &mdash; Scan in &ndash; initiate IO read, this changed on different architectures
SCNO &mdash; Scan out &ndash; initiate IO write, this changed on different architectures
STAG &mdash; Set tag (not allowed in user-level processes)
RTAG &mdash; Read tag
IRWL &mdash; Hardware pseudo operator
SPRR &mdash; Set processor register (highly implementation dependent, only used in lower levels of MCP)
RPRR &mdash; Read processor register (highly implementation dependent, only used in lower levels of MCP)
MPCW &mdash; Make PCW
HALT &mdash; Halt the processor (operator requested or some unrecoverable condition has occurred)


VARI &mdash; Escape to extended (variable instructions which were less frequent)
OCRX &mdash; Occurs index builds an occurs index word used in loops
LLLU &mdash; Linked list lookup &ndash; Follow a chain of linked words until a certain condition is met
SRCH &mdash; Masked search for equal &ndash; Similar to LLLU, but testing a mask in the examined words for an equal value
TEED &mdash; Table enter edit destructive
TEEU &mdash; Table enter edit, update
EXSD &mdash; Execute single micro destructive
EXSU &mdash; Execute single micro update
EXPU &mdash; Execute single micro, single pointer update
NOOP &mdash; No operation
NVLD &mdash; Invalid operator (hex code FF)
User operators &mdash; unassigned operators could cause interrupts into the operating system so that algorithms could be written to provide the required functionality

Edit operators

These were special operators for sophisticated string manipulation, particularly for business applications.

MINS &mdash; Move with insert &ndash; insert characters in a string
MFLT &mdash; Move with float
SFSC &mdash; Skip forward source character
SRSC &mdash; Skip reverse source characters
RSTF &mdash; Reset float
ENDF &mdash; End float
MVNU &mdash; Move numeric unconditional
MCHR &mdash; Move characters
INOP &mdash; Insert overpunch
INSG &mdash; Insert sign
SFDC &mdash; Skip forward destination character
SRDC &mdash; Skip reverse destination characters
INSU &mdash; Insert unconditional
INSC &mdash; Insert conditional
ENDE &mdash; End edit

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