Package on package

Package on package

Package-on-Package (PoP) is an integrated circuit packaging technique to allow vertically combining discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed on top of one another, i.e. stacked, with a standard interface to route signals between them. This allows higher density, for example in the mobile telephone / PDA market.

Typical Configurations

There are two widely used configurations for PoP:
* Pure memory stacking (two or more memory only packages are stacked on top of each other)
* Logic package in the bottom, memory package on top. For example, the bottom could be an application processor for a cell phone. The logic package goes on the bottom because it requires many more BGA connections to the motherboard.


The most obvious benefit is motherboard space savings. PoP shares this trait with Stacked-Die Packages. However there are several key differences between stacked-die and stacked-package products.

The main financial benefit of Package-on-package is that the memory device is decoupled from the logic device. Thus:
* The memory package can be tested separately from the logic package
* Only "known good" packages are used in final assembly (if the memory is bad only the memory is thrown away and so on). Compare this to stacked-die packages where the entire set is thrown away if either the memory or logic is bad.
* The end user (example cell phone maker or digital camera maker) controls the logistics. This means they can source the memory as they see fit. This month the memory can be from Samsung, next month it could be from Numonyx. The memory becomes a commodity to be sourced from the lowest priced supplier.
* Because the construction is like "lego" any mechanically mating top package can be used. For a low-end phone a smaller memory configuration may be used on the top package. For a high-end phone more memory could be used, with the same bottom package. This simplifies inventory control by the OEM. For a stacked-die package, the exact memory configuration needs to be known weeks (or months) in advance.
* Because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider (such as Qualcomm) would need to buy wafers of memory from a supplier such as Numonyx.

Electrically, PoP offers benefits by minimizing track length between, for example, a controller and a memory. This results in better electrical performance of the devices, since the shorter routing of interconnections between circuits results in faster signal propagation and reduction in noise and cross-talk.

JEDEC Standardization

* JEDEC JC-11 committee deals with package outline drawing standards related to the bottom PoP package. See documents MO-266A and JEDEC publication 95, Design Guide 4.22.
* JEDEC JC-63 committee deals with top (memory) PoP package pinout standardization. See JEDEC Standard No. 21-C, Page 3.12.2 – 1

Other Names

Package-on-package is also known by other names:
* PoP (which refers to the combined top and bottom packages)
* [ PSvfBGA] refers to the bottom package (Stands for Package Stackable Very thin Fine pitch BGA)
* PSfcCSP refers to the bottom package (Stands for Package Stackable Flip Chip Chip Scale Package)

External Links

* [ Practical Components PoP Samples and Test Boards (daisy chains)]
* [ Package-on-Package: The Story Behind This Industry Hit (Semiconductor International, 6/1/2007)]
* [ Package-on-package is killer app for handsets (EETimes Article July 2008)]
* [ SMT PoP Presentation Video]
* [ "POP" Goes the Future (Assembly Magazine, 9/30/2008)]
* The [ BeagleBoard] uses a PoP processor

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