- Digital Clock Manager
Digital Clock Manager is a function for manipulating clock signals by: 
- Multiply and divide an incoming clock (DFS).
- Recondition a clock to, for example, ensure 50% duty cycle.
- Phase shift (DLL).
- Eliminate clock skew.
- Clock signal
- Delay-locked loop
- Phase-locked loop
- Field-programmable gate array (DCM is used in FPGA)
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