Status register

Status register

A status register or flag register (also: condition code register, program status word, PSW, etc.) is a collection of flag bits for a processor. An example is the FLAGS register of the x86 architecture.

The status register is a hardware register which contains information about process state. Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor. The status register in a traditional processor design includes at least three central flags: Zero, Carry, and Overflow, which are tested via the condition codes that are part of many machine code instructions. A status register may often have other fields as well, such as more specialized flags, interrupt enable bits, and similar types of information. During an interrupt, the status of the thread currently executing can be preserved (and later recalled) by storing the current value of the status register along with the program counter and other active registers into the machine stack or a reserved area of memory.

The most common flags

Flag Name Description
Z Zero flag Indicates that the result of an arithmetic or logical operation (or, sometimes, a load) was zero.
C Carry flag Enables numbers larger than a single word to be added/subtracted by carrying a binary digit from a less significant word to the least significant bit of a more significant word as needed. It is also used to extend bit shifts and rotates in a similar manner on many processors (sometimes done via a dedicated X flag).
S / N Sign flag / Negative flag Indicates that the result of a mathematical operation is negative. In some processors,[1] the N and S flags are distinct with different meanings and usage: One indicates whether the last result was negative whereas the other indicates whether a subtraction or addition has taken place.
V / O / W Overflow flag Indicates that the signed result of an operation is too large to fit in the register width using twos complement representation.
P Parity flag Indicates whether the number of set bits of the last result is odd or even.

See also


  1. ^ Toshiba 900 Operation Manual, chap. 3

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