- Sinclair ZX81
Released = 1981
Discontinued = 1984 [cite book |last=Forster |first=Winnie |authorlink=Winnie Forster |title=The encyclopedia of consoles, handhelds & home computers 1972 - 2005 |year=2005 |publisher=GAMEPLAN |isbn=3-00-015359-4|pages=pp. 44] .
Z80at 3.25 MHz (most machines used the NEC µPD780C-1 equivalent)
Memory = 1 KB (64 KB max. 56 KB useable)
The Sinclair ZX81
home computer, released by Sinclair Researchin 1981, was the follow up to the company's ZX80.The case was black, with a membrane keyboard; the machine's distinctive appearance was the work of industrial designer Rick Dickinson. Video output, as in the ZX80, was to a television set, and saving and loading programs was via an ordinary home audio tape recorderto audio cassette. Timex Corporationmanufactured kits as well as assembled machines for Sinclair Research. In the United Statesa version with double the RAMand an NTSC televisionstandard was marketed as the " Timex Sinclair 1000".
As with the ZX80, the processor was a NEC
Zilog Z80-compatible, running at a clock rate of 3.25 MHz, but the system ROM had grown to 8192 bytes in size, and the BASIC now supported floating pointarithmeticcite journal |last= Tebbutt |first= David|authorlink= |coauthors= |year= 1981|month= June|title= Bench Test Sinclair ZX81 |journal= Personal Computer World |volume= |issue= |pages= 67–70,154|id= |url= |accessdate= ] . It was an adaptation of the ZX80 ROM by Steve Vickers on contract from Nine Tiles Ltd, the authors of Sinclair BASIC. The new ROM also worked in the ZX80 and Sinclair offered it as an upgrade for the older ZX80 for a while.
As suggested, the computer was similar to the ZX80, but was built around a semi-custom Ferranti
ULA( Uncommitted Logic Array) instead of TTL logic. The redesigned system board therefore had only four or five ICs: the microprocessor, the ULA, the 8192 bytes ROM, and either one 1024 bytes RAM chip, or two 1024x4 bit RAM chips.
The base system as supplied (in the UK for approximately GB£70 fully built and GB£50 as a kit requiring soldering , or US$100 in the US) had 1 KB (KiB) of RAM. This RAM was used to hold the computer's system variables, the screen image, and any programs and data. The screen was text only, 32 characters wide by 24 high. Blocky graphics with a resolution of 64 by 48 pixels were possible by the use of the PLOT command, which selected among a set of 16 graphics characters. [cite web | last=Barber | first=Matt | year=1999 | month=March | title=ZX 81 FAQ | url=http://www.honneamise.u-net.com/zx81/zx81faq.html | accessdate=2008-06-25 ]
To conserve memory, the text displayed on screen was stored as dynamic strings: for example, a screen line of 12 characters would be stored as only those 12 characters followed by the code for "NEWLINE"; also, when memory grew short, the number of lines displayed on the TV screen were reduced. Using this knowledge, it was common to write programs that kept to the top left of the screen to save memory. Furthermore, the BASIC interpreter (like many others) stored its keywords as 1-byte tokens. These quirks made it possible for many games and applications to run in the minimalistic 1 KB, including a basic game of Chess.
Originally sold via mail order in kit or assembled form, but a later deal with high street retail W.H.Smith saw the ZX81 and all accessories being sold on the high street (ZX81 was £69.99, 16K RAM pack £49.99, Printer £49.99)
The ZX81 was used as an analogy in the Comedy cult series
Red Dwarf(S05E01 - Psiriens) in exclamation that their ship had survived a collision and crash landing wholly intact"Starbug was made to last, sir. This old baby has crashed more times than a ZX81"
Even with all these space saving measures, the built-in memory of the machine did not go very far, so the ZX 16K RAM (or Timex-Sinclair TS1016) expansion pack was available with 16 KB of RAM (GB£49.95 n the UK, US$100 in the US). By mid-
1982, third-party 32 KB and 64 KB expansion packs were available. These plugged onto the main circuit board expansion bus edge connector (the 16 KB Memopak from Memotechcould be "stacked" with a 16 KB or 32 KB one) and were notorious for their loose and wobbly connection to the main board. A swift nudge or jolt to a powered-on ZX81 with such an expansion pack usually resulted in a computer crash, known as a 'whiteout', and the loss of hours of programming. Enterprising users used Blu Tack, tape, and other adhesives to support the 16k RAM Pack so that it did not wobble.
Printers and add-ons
The Sinclair ZX Printer was also marketed to accompany the ZX81; this was a
spark printer(although it was sometimes misleadingly called a " thermal printer") in which a wire point sparked the dot pattern into 4-inch-wide silvery-grey aluminised paper, accompanied by a distinct odour of ozone. Although there were FCCcompliance issues, the ZX Printer was marketed in the US for a limited time, and later the Timex-Sinclair 2040 thermal printer was produced (also available in the UK as the Alphacom 32).
There were also a third-party
RS-232serial interface (at ~US$140) and a Centronicsparallel interface (at ~US$105) that would allow the ZX81 to communicate to a standard printer, as well as a full-sized external keyboard (at ~US$85). Memopak also produced a programmable RS-232 dongle, as well as 16, 32, & 64 KB RAM expansion dongles. The RS-232interface was sometimes used to employ the ZX81 as a robotics controller (although a memory expansion pack was required) and it was well suited for this task as it was sufficiently cheap for a sole-use application.
A number of companies such as
DK'tronicsand Fuller (with the FD42) sold a case and keyboard that, with some skill, could be used to replace the membrane keyboard and black "doorstop" case.
Fast and slow
In both the ZX81 and ZX80, the video signal was generated largely by the Z80 chip itself. When the ZX80 ran a program, the screen blanked until the program paused for input or completed. The ZX81 improved on this by having two modes of operation: FAST mode, blanking while programs ran (like the ZX80), and SLOW mode (around 25% the speed) in which the video signal was maintained since programs only ran during the blank top and bottom border area of the screen.
Since a FOR-NEXT loop from 1 to 1000 took around 18-19 seconds in SLOW mode, it was common to run the machine in FAST all the time, even when editing a program, causing the TV to flash every time a key was pressed. The BASIC interpreter in itself was not optimised for speed either; comparable Z80-based interpreters were often significantly faster, especially those allowing selected variables declared integer. For instance, a Z80-based
home computersuch as the ABC 80(using a 3 MHz clock) could execute the same FOR-NEXT loop approximately 15 times as fast as the ZX81 in FAST mode, i.e. around 60 times as fast as the ZX81 in SLOW mode.
The ZX81 did not have the ability to make sound, but by switching between FAST and SLOW mode in various combinations under the control of a program, it was possible to modulate the interference that the processor caused on the TV and create a VERY simple musical keyboard. [Producer
Aphex Twinclaims he was able to play music on a ZX81 when he had one at the age of 11. [http://xltronic.com/nostalgia/aphextwin.nu/v4/learn/100771194880071.shtml] ]
The ZX81 did not use
ASCIIbut had its own character set. Character code 0 was space, codes 1–10 were used for blocky graphics, codes 11–63 corresponded to punctuation, numbers and upper casecharacters. Character codes 128–191 were reverse videoversions of the first 64 characters. Other codes represented BASIC keywords and control codes such as NEWLINE. There were no lower casecharacters. Keys typically served three or four purposes, with some serving five (from a character, a graphic icon, a symbol or input function and up to three BASICkeywords) with the user selecting each via the "shift" key, Function mode or Graphics modes, with the cursor showing which mode is current. Another trait of the ZX81 was that it echoed the signal from the tape recorder to the screen whilst loading and saving programs using cassettes, causing the TV to display zigzagging patterns.
Because the display was generated primarily by software in the ZX81 ROM, it was possible to override the
interrupt service routineand generate the display oneself. Several "hi-res" (meaning, 256×192, rather than 64×48) games did this, notably from a company called Software Farm.
There was a notorious bug causing some ZX81s to give the
square rootof 0.25 as 1.3591409 rather than 0.5Fact|date=May 2007. Sinclair's reputation for poor quality controlwas due less to the existence of the bug in some machines, and more to the time it took to react once the bug had been reported. Conversely, an article in BYTEof the time, comparing mathematical accuracy of several mainstream and much more expensive computers of the time, reflected positively on the ZX81.
BASICinterpreter was fully proprietary, unlike most microcomputersof this era (except the original Apple II) which used a series of similar but incompatible Microsoft BASICvariants. This meant that there was no need to comply with ASCII or any other existing standards.
uccess and successors
The Sinclair ZX81 was sold in the U.S. by Sinclair itself (from its facility in
Nashua, New Hampshire) and also by Timex as the Timex Sinclair 1000. The TS1000 shipped with twice as much RAM (2 KB). The ZX81 sold 1.5 million units [cite book |last=Forster |first=Winnie |authorlink=Winnie Forster |title=The encyclopedia of consoles, handhelds & home computers 1972 - 2005 |year=2005 |publisher=GAMEPLAN |isbn=3-00-015359-4|pages=pp. 44] , until it was replaced by its successor, the ZX Spectrum, capable of color graphics(and a Z80 freed from heavy tv-scan duties).
The technical means used to implement the display and other parts of ZX81 was quite original — at a time when the entire "home" class of computers was in its infancy. The system operated as follows:
The integrated circuits
The ZX81 contains (depending on RAM type) four or five chips; ROM, CPU, SRAM, and a
Ferranti Gate array(or ULA – " Uncommitted Logic Array"). The ROM occupies addresses 0–8191 (but also addresses 8192–16383, due to minimal decoding hardware). The 1 KB (or 2 KB for Timex) SRAM is placed at address 16384 (but repeats up to address 32767). A15 is used for display purposes (see below), and the upper 32 KB memory area is therefore unusable for code execution. It may still be used to store data, such as BASIC programs or large arrays, however. Unless more than 16 KB RAM is installed, this upper 32 KB area is mirroring the lower 32 KB (except for code execution).
The computer uses a resizable display-file (screen buffer) meaning that it can be expanded or shrunk depending on the amount of installed memory and the amount of free space at the moment.
There is also a completely non-standard (non-
ASCII) character set in which codes 0–63 are printable characters and 128–191 the same characters in reverse video. Bit 6 has special meaning here as, under normal circumstances, the only value with bit 6 set that should be written to the display file is 118, which is a NEWLINE (and also the opcode for HALT!). Placing any other byte with bit 6 set into the display-file would cause unexpected results and may cause the machine to crash.
The ZX81 has the
bitmaps (patterns) of the character set stored in the uppermost 512 bytes of its 8 KB BASIC ROM.
To reduce the number of ICs, and also enable the use of standard 40-pin package for the ULA,
resistorsare employed as simple multiplexers, placed in series with the data lines (CPU & ULA on one side, ROM & RAM on the other), allowing the ULA to override data when the CPU reads from memory (see below).
There are also resistors in series with address lines A0–A8, separating the ROM and ULA from the CPU (and from any
add-on hardware) on those lines; this is used by the ULA to read pixelpatterns out of the ROM by overriding address bits A0–A8, while allowing the CPU to control address bits A9–A12 (see below).
The conversion of the character codes into pixels on the TV screen employs both well known and other Z80-specific capabilities, most notably the use of the R and I registers:
The register R is intended as a dynamic RAM refresh counter; during the last part of each opcode fetch, the value of this counter is fed onto the lower portion of the address bus, and the RFSH control signal becomes active. However, also the interrupt vector register, I, is output* during the refresh cycles, but on the "upper" portion of the address bus.
The HALT instruction is also of central importance in the ZX81, it's necessary to know that a halted Z80 executes repeated
NOPs until an interrupt occurs, and that these NOPs causes the refresh counter to tick, just as normal NOPs do.
"* Undocumented by
Zilogand other manufacturers (such as NEC) at the time."
The membrane keyboard is scanned during (and closely coupled to) the vertical retrace interval. The scan pattern is laid out by the upper* eight bits of the "unbuffered" address bus and read back through five TTL inputs (8×5 = 40). It thus takes eight readings to determine which "keys" are being pressed. Decoding and debounce are done in software.
"* This exploits the undocumented feature that (for instance) IN A, (C) actually puts the whole BC register pair on the address bus."
TV picture generation
The I register is normally set to point to the base of the character set bitmap table in ROM. The refresh counter, R, is used to count the 32 "character positions" on the screen during each scan line. The
program counter, PC (see below), counts actual "character codes", which may be less than 32 due to the fact that the display-file is dynamically sized.
During each scan line, the CPU enters a HALT state as soon as it encounters the NEWLINE (HALT) that terminates each line of characters in the display-file, and when the R register has counted all 32 positions, a
maskable interrupt(INT) is generated to bring the processor out of the HALT state just in time to prepare for another raster line.
During the upper and lower blank parts of the screen, the computer executes "application code" (i.e. BASIC or machine code), but a non-maskable interrupt (or NMI) briefly interrupts even this, once every HSYNC period; a counter is updated by the NMI-routine, so it can decide whether it's time to go back and produce character patterns again.
Unfortunately, the use of the SLOW (smooth multitasking mode) slows all other processing by approximately 75% compared to the FAST (flickery mode).
To actually produce a TV raster scan line of 256 pixels, the interrupt routine literally "jumps to" the start of the currently scanned line of characters in the display file, but with address line A15 set (i.e. 32768 added); the Z80 control line M1 is also active (indicating an opcode-fetch), and this combination is detected by the ULA:
The CPU fetches the character codes (as if it were opcodes), enabling the ULA to easily latch the values; by forcing a NOP (all zeros) onto the Z80 data bus after each retrieved byte, the ULA ensures that "nothing happens" except that the R register keeps track of the character positions on the line, and that the program counter functions as an auto incrementing pointer into the display file.
As long as the retrieved data has bit 6 reset (a character), the CPU will continue "executing" characters (as NOPs), helping the ULA reading character codes out of the display file. When the ULA detects the HALT (bit 6 set), it allows the Z80 to execute it normally; the processor stays halted and executes NOPs until the R-register wraps around to zero and thereby generates an INT — this works because INT is hardwired to A6.
This process is repeated eight times for each line of characters, and 192 times for a full TV frame. The ZX81 makes extensive use of rather intricate "instruction timing", in the ROM program, as well as some small but delicate hardware fixes to fine-tune this system and avoid glitches and jitter in the generated video picture.
The INT routines are not proper interrupt routines, in that they mostly do not return. Instead, the
return addressis constantly discarded so that each interrupt can, technically, interrupt the previous without causing stack overflow. Only once every eight scan lines (pixel lines) is the pushed address used, it then points to the next line of characters in the (possibly) irregular display file, directly after the HALT instruction.
The NMI interrupt, however, always makes a conventional return to the application code (i.e. the BASIC interpreter or another machine code program) during the greater part of each blank line in the upper and lower parts of the screen (the upper and lower borders). However, when it's time to initiate the character pattern display, it turns the NMI generator off, and transfers control to the INT routines (and vice versa).
More details and timing
Due to the refresh-mechanism, the Z80
opcode-fetch consists of four clock cycles, which (during generation of eight pixels) are spent as follows:
During the first and second (the opcode fetch), the processor attempts to fetch a character code (as if it were an instruction), but the ULA latches the actual data, while forcing a NOP onto the Z80-bus, as described above.
During the third and fourth (the DRAM refresh) the ULA composes the address to the actual byte of pixel-data; bits 0–5 of the latched code is fed onto bits 3–8 of the ROM address (selecting one of the 64 different character patterns); the
interrupt vectorregister supplies the base address (bit 9-12), while bits 0–3 comes from a modulo 8 counter (in the ULA) clocked by HSYNC and thereby selecting one of the eight pixel-rows for all characters on a line simultaneously. The byte from the ROM is then fed into a shift-register, controlled by the same "crystal" as the CPU, and clocked out to the TV set at twice the CPU frequency (8 pixels during the 4 cycle NOP).
TV synchronization pulses (HSYNC and VSYNC) are output by the ULA and mixed with the video signal such that white=5V, black=2.5V, and SYNC=0V and fed to the HF-modulator. HSYNC is autonomously generated in hardware, while VSYNC is generated under CPU control in connection with keyboard scanning.
Bit 7 from the original character byte is read by the ULA and controls inverse-video on a per-character basis. The video synchronization pulses uses the same individual I/O bit as is used to generate the output for the 250 bit/s cassette recorder interface. This is the reason for the strange patterns displayed on the TV while saving or loading programs.
RAM pack & add-ons
The lower eight I/O address bits were used as individual chip selects for individual I/O devices within the ULA. Every lower address bit except that selecting the desired device would therefore have to be one, theoretically allowing up to eight I/O devices. In the standard configuration, the only I/O present (unless the optional external ZX Printer was plugged into the 40-pin bus edge connector) was one bit for the cassette input, one bit for the cassette/video sync output, a five-bit word of input from the keyboard (which resembled a car bumper sticker more than it resembled a proper keypad) and whatever control registers were required to enable the ULA itself for
videogeneration. This meant that not all eight bits were used, allowing some limited room for external expansion.
ZX 16K RAM pack
The 16K RAM pack tied the RAM-CS line on the 40-pin edge connector to +5V to disable the internal RAM. It used eight 4116 16 K x 1 bit dynamic RAM chips contained in 16-pin
dual inline packages (1 data pin and 7 multiplexed address pins with /RAS, /CAS, /WE, and power). These old chips required +12 V, +5 V and -5 V so the RAM pack contained an oscillator and some inductors to convert +5V into the other required voltages as well as circuitry to multiplex the address lines, adding significantly to its internal complexity.
The ZX81's internal voltage was regulated by a simple 7805 5V linear regulator attached to a small heatsink. This could became rather warm as the voltage into the 3.5 mm jack could vary within an approximate 9V-18V range depending on factors such as actual load (RAM pack, printer, etc) and line voltage variations.
Unfortunately the 40 pin bus edge connector itself was not
gold-plated (the contacts were covered with plain solder) and was very prone to oxidation.Fact|date=August 2008 In addition the mechanical design of the Sinclair RAM pack (inherited from the ZX80's RAM pack) resulted in an insecure connection to the ZX81, which rendered the upgraded system very crash-prone. This would become annoying as it would take eight minutes to reload the full 16 KB RAM from an (often-unreliable) cassette tape. Home-brew "kludge" solutions to this problem varied from physically bolting the computer and RAMpack to a solid substrate to placing the whole works in a larger case with a proper surplus keyboard in place of the original.
User defined characters and high-resolution graphics
Another less-common upgrade made by some end-users was to connect static RAM (as "pseudo-ROM") in place of the ROM mirrored at addresses 8192–16383. This RAM would need to be connected to the same side of the data bus resistors as the ROM itself so that it could be used to store a user-defined character set of up to 64 characters. One variant on this theme added a one-bit latch to latch the high data bit of the original character (when M1 and A15 were both active) in order to use it to drive one of the address bits, allowing all 128 character bitmaps to be redefined.
As the main RAM was on the wrong side of the data and address bus resistors for this to work, the extra static RAM was required for this approach. Loading the I register to point to the main RAM would not produce the desired result, instead displaying garbage as pixels.
The ZX81 was cloned for sale outside Europe, with
Timex Sinclair, a joint venture, producing the TS1000for the US market.
The ZX81 was also cloned in the Brazilian Market by many local companies, among them: Apply, Ritas,
Microdigitaland Prológica (these two being the main competitors for the market). Microdigital produced several ZX80 clones (TK 80 and TK 82/82C), a ZX81 clone (the TK 83), a TS1500 clone (TK 85), and two ZX Spectrumclones (TK 90X and TK 95) [http://www.interface1.net/zx/clones/microdigital.html] . Prológica produced NE-Z80 (ZX80 clone), NEZ-8000, CP-200 and CP-200S (late cheaper version).There was also a clone in the Argentine market, produced by a electrical motor factory Czerweny: the TS1000 clone (CZ1000), the TS1500 clone CZ1500 and the TS2068 clone (CZ2000)
* [http://www.nvg.ntnu.no/sinclair/computers/zx81/zx81.htm Planet Sinclair:ZX81]
* [http://www.chuntey.com/eightyone/ EightyOne ZX81 Emulator for Windows] (GPL)
* [http://www.pictureviewerpro.com/hosting/zx81/index.htm The Sinclair ZX81 Support Page]
* [http://www.rwapservices.co.uk/ZX80_ZX81/forums/ English language FORUM about ZX81 computers]
* [http://www.apj.co.uk/zx81/zx81.asp Review of Sinclair ZX81 from June 1981]
* [http://www.zx81.de/ ZX-TEAM: active ZX81 users group]
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