Avalanche transistor


Avalanche transistor

An Avalanche Transistor is a bipolar junction transistor designed for operation in the region of its collector-current/collector-to-emitter voltage characteristics beyond the collector to emitter breakdown voltage, called avalanche breakdown region . This region is characterized by avalanche breakdown, a phenomenon similar to Townsend discharge for gases, and negative differential resistance. Operation in the avalanche breakdown region is called avalanche mode operation: it gives avalanche transistors the ability to switch very high currents with less than a nanosecond rise and fall times (transition times).

History

The first paper dealing with avalanche transistor was Harv|Ebers|Miller|1955: the paper describes how to use alloy-junction transistor in the avalanche breakdown region, in order to overcome speed and breakdown voltage limitations which affected the first models of such kind of transistor when used in earlier computer digital circuits. Therefore the very first applications of avalanche transistor were in switching circuits and multivibrators. The introduction of the avalanche transistor served also as an application of Miller's empirical formula for the avalanche multiplication coefficient M, first introduced in the paper Harv|Miller|1955: the need of better understanding transistor behavior in the avalanche breakdown region,not only for using them in avalanche mode, gave rise to a extensive research on impact ionization in semiconductors (see Harv|Kennedy|O'Brien|1966). From the beginning of the 1960s to the first half of the 1970s, several avalanche transistor circuits were proposed, and also it was studied what kind of bipolar junction transistor is best suited for the use in the avalanche breakdown region: a complete reference, which includes also the contributions of scientists from ex-USSR and COMECON countries, is the book Harv|Дьяконов (D'yakonov)|1973. The first application of the avalanche transistor as a linear amplifier, named Controlled Avalanche Transit Time Triode, (CATT) was described in Harv|Eshbach|Se Puan|Tantraporn|1976: a similar device, named IMPISTOR was described more or less in the same period in the paper Harv|Carrol|Winstanley|1974. Linear applications of this class of devices started later since there are some requirements to fulfill, as described below: also, the use of avalanche transistor in those applications is not mainstream since the devices require high collector to emitter voltages in order to work properly. Nowadays, there is still active research on avalanche devices (transistors or other) made of compound semiconductors, being capable of switching currents of several tens of amperes even faster than "traditional" avalanche transistors.

Basic theory

Static avalanche region characteristics

In this section, the I_C-V_{CE} static characteristic of an avalanche transistor is calculated. For the sake of simplicity, only an NPN device is considered: however, the same results are valid for PNP devices only changing signs to voltages and currents accordingly. The analysis closely follows that of William D. Roehr in Harv|Roehr|1963.Since "avalanche breakdown multiplication is present only across the collector-base junction", the first step of the calculation is to determine collector current as a sum of various component currents "though the collector" since only those fluxes of charge are subject to this phenomenon. Kirchhoff's current law applied to a bipolar junction transistor implies the following relation, "always" satisfied by the collector current I_C

:I_C=I_E-I_B,

while for the same device working in the active region, basic transistor theory gives the following relation

:I_C=eta I_B+(eta+1)I_{CBO},

where
*I_B is the "base current",
*I_{CBO} is the "collector-base reverse leakage current",
*I_E is the "emitter current",
*eta is the "common emitter current gain" of the transistor.Equating the two formulas for I_C gives the following result

:I_E = (eta + 1)I_B + (eta + 1)I_{CBO},

and since alpha = eta{(eta +1)^{-1 is the "common base current gain" of the transistor, then

:alpha I_E = eta I_B + eta I_{CBO} = I_C - I_{CBO} iff I_C = alpha I_E + I_{CBO}

When avalanche effects in a transistor collector are considered, the collector current I_C is given by

:I_C=M(alpha I_E +I_{CBO}),

where M is Miller's avalanche multiplication coefficient. It is the most important parameter in avalanche mode operation: its expression is the following

:M = {frac{1}{1-left(frac{V_{CB{BV_{CBO ight)^{n},

where
*BV_{CBO} is the "collector-base breakdown voltage",
*n is a constant depending on the semiconductor used for the construction of the transistor and doping profile of the collector-base junction,
*V_{CB} is the collector-base voltage.

Using again Kirchhoff's current law for the bipolar junction transistor and the given expression for M, the resulting expression for I_C is the following

:I_C=frac{M}{1-alpha M}(I_{CBO} + alpha I_B)iff I_C =frac{I_{CBO} + alpha I_B}{1-alpha - left(frac{V_{CB{BV_{CBO ight)^{!n} }

and remembering that V_{CB} = V_{CE} - V_{BE} and V_{BE} = V_{BE}(I_B) where V_{BE} is the "base-emitter voltage"

:I_C =frac{I_{CBO} + alpha I_B}{1-alpha - left(frac{V_{CE}-V_{BE}(I_B)}{BV_{CBO ight)^{!n} }cong frac{I_{CBO} + alpha I_B}{1-alpha - left(frac{V_{CE{BV_{CBO ight)^{!n} }

since V_{CE}>>V_{BE}: this is the expression of the "parametric family of the collector characteristics I_C-V_{CE}" with parameter I_B. Note that I_C increases without limit if

:left(frac{V_{CE{BV_{CBO ight)^{!n}= 1-alpha iff V_{CE}=BV_{CEO} = sqrt [n] {(1-alpha)}BV_{CBO}=frac{BV_{CBO{sqrt [n] {eta+1

where BV_{CEO} is the "collector-emitter breakdown voltage". Also, it is possible to express V_{CE} as a function of I_C, and obtain an analytical formula for the "collector-emitter differential resistance" by straightforward differentiation: however, the details are not given here.

Differential dynamical model

The differential dynamical mode described here, also called the small signal model, is the only intrinsic small signal model of the avalanche transistor. Stray elements due to the package enclosing the transistor are deliberately neglected, since their analysis wolud not add anything useful from the point of view of the working principles of the avalanche transistor. However, when realizing a electronic circuit, those parameters are of great importance: particularly stray inductances in series to collector and emitter leads have to be minimized to preserve the high speed performance of avalache transistor circuits. Also, this equivalent circuit is useful when describing the behavior of the avalanche transistor near its turn on time, where collector currents and voltages are still near their quiescent values: in the real circuit it permits the calculation of time constants and therefore rise and fall times of the V_{CE} waveform. However, since avalanche transistor switching circuits are intrinsically large signal circuits, the only way to predict with reasonable accuracy their real behaviour is to do numerical simulations. Again, the analysis closely follows that of William D. Roehr in Harv|Roehr|1963.

An avalanche transistor operated by a common bias network is shown in the picture on the right: V_{BB} can be zero or positive value, while R_E can be short circuited. In every avalanche transistor circuit, the output signal is taken from the collector or the emitter: therefore the small-signal differential model of an avalanche transistor working in the avalanche region is always seen from the collector-emitter output pins, and consist of a parallel RC circuit as shown in the picture on the right, which includes only bias componentsThe magnitude and sign of both those parameters are controlled by the base current I_B: since both Base-Collector and Base-Emitter junctions are inversely biased in the quiescent state, the equivalent circuit of the Base input is simply a current generator shunted by Base-Emitter and Base-Collector junction capacitances and is therefore not analyzed in what follows.The intrinsic time constant of the basic equivalent small signal circuit has the following value

: au_{Ace}=r_{Ace}C_{Ace},

where
*r_{Ace} is the "collector-emitter avalanche differential resistance" and, as stated above, can be obtained by differentiation of the collector-emitter voltage V_{CE} respect to the collector current I_C, for a constant base current I_B:r_{Ace}=frac{partial{V_{CE}{partial{I_CBigg|_{I_B=const.}
*"C_{Ace}" is the "collector-emitter avalanche differential capacitance" and has the following expression:C_{Ace}=-left(frac{1}{r_{Ace}omega_eta}-C_{ob} ight):where :"omega_eta=2pi f_eta" is the "current gain angular cutoff frequency" :"C_{ob}" is the "common base output capacitance"The two parameters "are both negative": this means that if the collector load const of an ideal current source, the circuit is unstable. This is the theoretical justification of the astable multivibrator behavior of the circuit when the V_{CC} voltage is raised over some critical level.

Second breakdown avalanche mode

When the collector current rises above the data sheet limit I_{CMAX} a new breakdown mechanism become important: the second breakdown. "This phenomenon is caused by excessive heating of some points (hot spots) in the base-emitter region of the bipolar junction transistor, which give rise to an exponentially increasing current through this points": this exponential rise of current in turn gives rise to even more overheating, originating a positive thermal feedback mechanism. While analyzing the I_C-V_{CE} static characteristic, the presence of this phenomenon is seen as a sharp collector voltage drop and a corresponding almost vertical rise of the collector current. At the present, it is not possible to produce a transistor without hot spots and thus without second breakdown, since their presence is related to the technology of refinement of silicon. During this process, very small but finite quantities of metals remain in localized portions of the wafer: these particles of metals became deep centers of recombination, i.e. centers where current exists in a preferred way. While this phenomenon is destructive for Bipolar junction transistors working in the usual way, "it can be used to push-up further the current and voltage limits of a device working in avalanche mode" by limiting its time duration: also, the switching speed of the device is not negatively affected. A clear description of avalanche transistor circuits working in second breakdown regime together with some examples can be found in the paper Harv|Baker|1991.

Numerical simulations

Avalanche transistor circuits are intrinsically large signal circuits, so small signal models, when applied to such circuits, can only give a "qualitative" description. To obtain more accurate information about the behavior of time dependent voltages and currents in such circuits it is necessary to use numerical analysis. The "classical" approach, detailed in the paper Harv|Дьяконов (D'yakonov)|2001 (?) which relies upon the book Harv|Дьяконов (D'yakonov)|1973, consists in considering the circuits as a system of nonlinear ordinary differential equations and solve it by a numerical method implemented by a general purpose numerical simulation software: results obtained in this way are fairly accurate and simple to obtain. However this methods rely on the use of analytical transistor models best suited for the analysis of the breakdown region: those models are not necessarily suited to describe the device working in all possible regions. A more modern approach consist in using the common analog circuit simulator SPICE together with an advanced transistor model supporting avalanche breakdown simulations, since the basic SPICE transistor model does not. Examples of such models are described in the paper Harv|Keshavarz|Raney|Campbell|1993 and in the paper Harv|Kloosterman|De Graaff|1989: the latter is a description of the Mextram model, currently used by some semiconductor industries to characterize their bipolar junction transistors.

A graphical method

A graphical method for studying the behavior or avalanche transistor was proposed in references Harv|Spirito|1968 and Harv|Spirito|1971: the method was first derived in order to plot the static behavior of the device and then was applied also to solve problems concerning the dynamic behavior. The method bears the spirit of the graphical methods used to design tube and transistor circuits directly from the characteristic diagrams given in data sheets by producers.

Applications

Avalanche transistors are mainly used as fast pulse generators, having rise and fall times of less than a nanosecond and high output voltage and current. They are occasionally used as amplifiers in the microwave frequency range, even if this use is not mainstream: when used for this purpose, they are called Controlled Avalanche Transit-time Triodes (CATTs).

Avalanche mode switching circuits

Avalanche mode switching relies on avalanche multiplication of current flowing through the collector-base junction as a result of impact ionization of the atoms in the semiconductor crystal lattice. Avalanche breakdown in semiconductors and has found application in switching circuits for two basic reasons
*it can provide very high switching speeds, since current builds-up in very small times, in the picosecond range, due to avalanche multiplication.
*It can provide very high output currents, since large currents can be controlled by very small ones, again due to avalanche multiplication.The two circuits considered in this section are the simplest examples of avalanche transistor circuits for switching purposes: both the examples detailed are monostable multivibrators. It is possible to find several more complex circuits in the literature, for example in the books Harv|Roehr|1963 and Harv|Дьяконов (D'yakonov)|1973. First, it is worth noting that the largest part of circuits employing an avalanche transistor is activated by the following two different kind of inputs:

*Collector triggering input circuit: the input trigger signal is fed to the collector via a fast switching diode D_S, possibly after being shaped by a pulse shaping network. This way of driving an avalanche transistor was extensively employed in first generation circuits since the collector node has a high impedance and also collector capacitance C_{ob} behaves quite linearly under large signal regime. As a consequence of this, the delay time from input to output is very small and approximately independent of the value of control voltage. However, this trigger circuit requires a diode capable of resist to high reverse voltages and switch very fast, characteristics that are very difficult to realize in the same diode, therefore it is rarely seen in modern avalanche transistor circuits.
*Base triggering input circuit: the input trigger signal is fed directly to the base via a fast switching diode D_S, possibly after being shaped by a pulse shaping network . This way of driving an avalanche transistor was relatively less employed in first generation circuits because the base node has a relatively low impedance and an input capacitance C_{ib} which is highly nonlinear (as a matter of fact, it is exponential) under the large signal regime: this causes a fairly large, input voltage dependent, delay time, which was analyzed in detail in the paper Harv|Spirito|1974. However, the required inverse voltage for the feed diode is far lower respect diodes to be used in collectior trigger input circuits, and since ultra fast Schottky diodes are easily and cheaply found, this is the driver circuit employed in most modern avalanche transistor circuit. This is also the reason why the diode D_S in the following applicative circuits is symbolized as a Schottky diode. Avalanche transistor can also be triggered by lowering the emitter voltage V_E, but this configuration is rarely seen in the literature and in practical circuits.: in reference Harv|Meiling|Stary|1968, paragraph 3.2.4 "Trigger circuits" it is described one of such configuration where the avalanche transistor is used itself as a part of the trigger circuit of a complex pulser, while in reference Harv|Дьяконов (D'yakonov)|1973| pp=185 a balanced level discriminator where a common bipolar junction transistor is emitter-coupled to an avalanche transistor is briefly described.

The two avalanche pulser described below are both base triggered and have two outputs. Since the device used is a npn transistor, V_{out1} is a positive going output while V_{out2} is a negative going output: using a pnp transistor reverses the polarities of outputs. The descripion of their simplified versions, where resistor R_E or R_L is set to zero ohm (obviously not both) in order to have a single output, can be found in reference Harv|Millman|Taub|1965. Resistor R_C recharges the capacitor C_T or the transmission line scriptstyle TL_{t_f} (i.e. the energy storage components) after commutation: it has usually a high resistance in order to limit the static collector current, so the recharging process is slow. Sometimes this resistor is replaced by an electronic circuit which is capable of charging faster the energy storage components: however this kind of circuits usually are patented so they are rarely found in mainstream application circuits.

*Capacitor discharge avalanche pulser: a trigger signal applied to the base lead of the avalanche transistor cause the avalanche breakdown between the collector and emitter lead. The capacitor C_T starts to be discharged by a current flowing through the resistors R_E and R_L: the voltages across those resistors are the output voltages. The current waveform is not a simple RC discharge current but has a complex behavior which depends on the avalanche mechanism: however it has a very fast rise time, of the order of fractions of nanosecond. Peak current depends on the size of the capacitor C_T: when its value is raised over a few hundred picofarads, transistor goes in to second breakdown avalanche mode, and peak currents reach values of several amperes if not tens of amperes.
*Transmission line avalanche pulser: a trigger signal applied to the base lead of the avalanche transistor cause the avalanche breakdown between the collector and emitter lead. The fast rise time of the collector current generates a current shock wave of approximatively the same amplitude, which propagates along the transmission line: the wave reaches the open circuited end of the line after the characteristic delay time t_f of the line has elapsed, and then is reflected backward. If the characteristic impedance of the transmission line is equal to the resistances R_E and R_L, the backward reflected shock wave reaches the beginning of the line and stops. As a consequence of this traveling wave behavior, the current flowing through the avalanche transistor has a rectangular shape of duration

::t=2t_f,

In practical designs, an adjustable impedance like a two terminal Zobel network (or simply a trimmer capacitor) is placed from the collector of the avalanche transistor to ground, giving to the tramission line pulser the ability of reduce ringing and other undesidered behavior on the output voltages.

It is possible to turn those circuits into astable multivibrators by removing their trigger input circuits and
#raising their power supply voltage V_{CC} until a relaxation oscillation begins, or
#connecting the base resistor R_B to a "positive" base bias voltage V_{BB} and thus forcibly starting avalanche breakdown and associated relaxation oscillationA well detailed example of the first procedure is described in reference Harv|Holme|2006. It is also possible to realize avalanche mode bistable multivibrators, but their use is not as common as other tipes described of multivibrators, one important reason being that they require two avalanche transistors, one working continuously in avalanche breakdown regime, and this can give serious problems from the point of wiev of power dissipation and device operating life.

The Controlled Avalanche Transit-time Triode (CATT)

Avalanche mode amplification relies on avalanche multiplication as avalanche mode switching. However, for this mode of operation, it is necessary that Miller's avalanche multiplication coefficient M be kept almost constant for large output voltage swings: if this condition is not fulfilled, significant amplitude distortion arises on the output signal. This implies that

*avalanche transistors used for application in switching circuits cannot be used since Miller's coefficient varies widely with the collector to emitter voltage
*the operating point of the device cannot be in the negative resistance of the avalanche breakdown region for the same reason

These two requirements imply that a device used for amplification need a physical structure different from that of a typical avalanche transistor. The Controlled Avalanche Transit-time Triode (CATT), designed for microwave amplification, has a quite large lightly doped region between the base and the collector regions: this implies that the device has fairly high collector-emitter breakdown voltage BV_{CEO} respect to bipolar transistors having the same geometry. The current amplification mechanism is the same of the avalanche transistor, i.e. carrier generation by impact ionization, but there is also a transit-time effect as in IMPATT and TRAPATT diodes, where a high field region travels along the avalanching junction, precisely in along the intrinsic region. The device structure and choice of bias point imply that

#Miller's avalanche multiplication coefficient M is limited to about 10.
#The transit-time effect keep this coefficient almost constant and independent of the collector to emitter voltage.

A complete description of the theory for this kind of avalanche transistor is available in the paper Harv|Eshbach|Se Puan|Tantraporn|1976: in this paper it is also showh that this semiconductor device structure is well suited for microwave power amplification. It can deliver several watts of radio frequency power at a frequency of several gigahertz and it also features a control terminal (the base). However its use is not mainstream as already said,since it requires high voltages (greather than 200 volts) to work properly, while nowadays gallium arsenide or other compound semiconductors FETs deliver a similar performance while being easier to work with. A similar device structure, proposed more or less in the same period in the paper Harv|Carrol|Winstanley|1974, was the IMPISTOR, being a transistor with IMPATT collector-base junction.

See also

*Avalanche breakdown
*Avalanche diode
*Bipolar junction transistor
*Multivibrator
*Pulse generator
*Second breakdown

References

*Harvrefcol
Surname = Baker
Given = R. Jacob
Title = [http://link.aip.org/link/?RSINAK/62/1031/1 High voltage pulse generation using current mode second breakdown in a bipolar junction transistor] (for a copy from the author's website see [http://cmosedu.com/jbaker/papers/RSI621991.pdf here] )
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Publisher = [http://www.aip.org The American Institute of Physics]
Volume =62
Page = 1031-1036
Year = 1991
. A clear description of avalanche transistor circuits working in the second breakdown region.
*Harvrefcol
Surname1 = Eshbach
Given1 = John R.
Surname2 = Se Puan
Given2 = Yu
Surname3 = Tantraporn
Given3 = Wirojana
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1478415&isnumber=31748&punumber=16&k2dockey=1478415@ieeejrns&query=%28%28controlled+avalanche+transit-time+triode%29%3Cin%3Emetadata%29&pos=1&access=yes Theory of a new three-terminal microwave power amplifier]
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Publisher = IEEE
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. The first article describing the working principles and potential applications of the CATT.
*Harvrefcol
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Given1 = Wolfgang
Surname2 = Stary
Given2 = Franz
Title = Nanosecond pulse techniques
Publisher = Gordon & Breach Science Publishers
Place = New York-London-Paris
Year = 1968
. Sections 3.1.5 "Avalanche transistors", 3.2 and 3.4 "Trigger circuits containing avalanche transistors".
*Harvrefcol
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Given1 = Jacob
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Given2 = Herbert
Title = Pulse, digital and switching waveforms
Publisher = [http://www.mcgraw-hill.com/ McGraw-Hill Book Company]
Place = New York-St. Louis-San Francisco-Toronto-London-Sydney
Year = 1965
. Mainly sections 6.9, 6.10, 12.10, 13,16, 13.17.
*Harvrefcol
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Given = William D.
Title = High-speed switching transistor handbook
Publisher = Motorola, Inc.
Place = Phoenix
Year = 1963
Edition = 3rd printing
. Chapter 9 "Avalanche mode switching".
* [http://www.zetex.com/3.0/appnotes/design/dn24.pdf The ZTX413 Avalanche Transistor] Zetex Semiconductor Design Note 24, October 1995.
* [http://www.zetex.com/3.0/appnotes/apps/an8.pdf The ZTX415 Avalanche Mode Transistor] Zetex Semiconductors Application Note 8, January 1996.

Bibliography

*Harvrefcol
Surname1 = Ebers
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Surname2 = Miller
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Title = Alloyed Junction Avalanche Transistors ( [http://crinklydoodle.com/bstj/papers.php abstract here] )
Journal = Bell System Technical Journal
Volume = 34
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. The first paper analyzing the use of bipolar junction transistors in the avalanche region.
*Harvrefcol
Surname1 = Kennedy
Given1 = D. P.
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Given2 = R. R.
Title = [http://domino.research.ibm.com/tchjr/journalindex.nsf/0b9bc46ed06cbac1852565e6006fe1a0/deeacf7b86ad7aa485256bfa00683f45?OpenDocument Avalanche Breakdown Calculations for a Planar p-n Junction]
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External links

Theory

*Harvrefcol
Surname1 = Carrol
Given1 = J.E.
Surname2 = Winstanley
Given2 = H.C.
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=4245299&isnumber=4245289&punumber=2220&k2dockey=4245299@ieejrns&query=%28%28impistor%29%3Cin%3Emetadata%29&pos=0&access=no Transistor improvements using an IMPATT collector]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220 IEE Electronics Letters]
Publisher = [http://www.iee.org IEE]
Year = 1974
Volume = 10
Page = 516-518
. A paper proposing and describing the IMPISTOR, a semiconductor device similar to the CATT.
*Harvrefcol
Surname = Дьяконов (D'yakonov)
Given = Владимир Павлович (Vladimir Pavlovich)
Title = [http://www.exponenta.ru/soft/Mathemat/dyakonov/nb9/nb9.asp Анализ статических вольтамперных характеристик диодов и транзисторов с учетом лавинного пробоя (Analysis of static volt-amperometric characteristics of diodes and transistors including avalanche breakdown)]
Year = 2000 (?)
Journal = [http://www.exponenta.ru Exponenta.ru]
. A paper analyzing the volt-amperometric characteristic of diodes and transistors using the computer algebra program Mathematica.
*Harvrefcol
Surname = Дьяконов (D'yakonov)
Given = Владимир Павлович (Vladimir Pavlovich)
Title = [http://www.exponenta.ru/soft/Mathemat/dyakonov/nb10/nb10.asp Расчет параметров импульсов емкостного релаксатора на лавинном транзисторе (Calculation of pulse parameters as a function of capacity in an avalanche transitor relaxation oscillator)]
Year = 2001 (?)
Journal = [http://www.exponenta.ru Exponenta.ru]
. A paper about the design of an avalanche transistor relaxation oscillator using the computer algebra program Mathematica.
*Harvrefcol
Surname1 = Hamilton
Given1 = Douglas J.
Surname2 = Gibbons
Given2 = James F.
Surname3 = Shockley
Given3 = Walter
Chapter = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1157029&isnumber=25934&punumber=8302&k2dockey=1157029@ieeecnfs&query=%28%28hamilton+and+avalanche%0D%0A%29%3Cin%3Emetadata%29&pos=10 Physical principles of avalanche transistor pulse circuits]
Title = IRE [http://ieeexplore.ieee.org/servlet/opac?punumber=8302 Solid-State Circuits Conference] , Volume II
Page = 92-93
Year = 1959
. A brief description of the basic physical principles of avalanche transistor circuits: instructive and interesting but "restricted access".
*Harvrefcol
Surname = Huang
Given1 = Jack S.T.
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1049775&isnumber=22499&punumber=4&k2dockey=1049775@ieeejrns&query=%28+%28%28huang%29%3Cin%3Eau+%29+%3Cand%3E+%28%28avalanche%29%3Cin%3Eti+%29+%29&pos=2&access=no Study of Transistor Switching Circuit Stability in the Avalanche Region]
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*Harvrefcol
Surname1 = Keshavarz
Given1 = A.A.
Surname2 = Raney
Given2 = C.W.
Surname3 = Campbell
Given3 = D.C.
Title = [http://www.osti.gov/bridge/servlets/purl/10183471-SR8vll/10183471.PDF Report SAND--93-0241C. A breakdown model for the bipolar transistor to be used with circuit simulators]
Publisher = Sandia National Laboratories
Year = 1993, August 1
available from [http://www.osti.gov/ the U.S. Department of Energy Office of Scientific & Technical Information] . A report describing a transistor model capable of including avalanche effects in SPICE simulations.
*Harvrefcol
Surname1 = Kloosterman
Given1 = W.J.
Surname2 = De Graaff
Given2 = H.C.
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=30944&isnumber=1331&punumber=16&k2dockey=30944@ieeejrns&query=%28%28avalanche+and+transistor%29%3Cin%3Emetadata%29&pos=13 Avalanche multiplication in a compact bipolar transistor model for circuit simulation]
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Publisher = [http://www.ieee.org IEEE]
Year = 1989
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Page = 1376-1380
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*Harvrefcol
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Surname2 = Rein
Given2 = H.M.
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1028098&isnumber=22087&punumber=4&k2dockey=1028098@ieeejrns&query=%28%28avalanche+and+transistor%29%3Cin%3Emetadata%29&pos=0 A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4 IEEE Journal of Solid State Circuits]
Publisher = IEEE
Volume = 37
Issue = 9
Year = 2002
Page = 1184-1197
. A paper describing a transistor model for bipolar cicuit simulation including avalanche effects ("restricted access").
*Jochen Riks " [http://www.fsphy.uni-duesseldorf.de/fp/exp10/node12.html Avalanche-Transistor] " (in German). A brief description of the working principles of the avalanche transistor, part of the course " [http://www.fsphy.uni-duesseldorf.de/fp/exp10/impuls.html Impulsschaltungen F-Praktikum EXP 10] ", June 1996, Fachschaft Physik Uni Düsseldorf.
*Harvrefcol
Surname = Spirito
Given = Paolo
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1049869&isnumber=22504&punumber=4&k2dockey=1049869@ieeejrns&query=%28+%28%28spirito%29%3Cin%3Eau+%29+%3Cand%3E+%28%28transistor%29%3Cin%3Eti+%29+%29&pos=3&access=no Direct Current-Voltage Characteristics of Transistors in the Avalanche Region]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4 IEEE Journal of Solid State Circuits]
Volume = 3
Issue = 2
Year = 1968
Page = 194-195
. A paper proposing a graphical method to plot the static characteristic of an avalanche transistor ("restricted access").
*Harvrefcol
Surname = Spirito
Given = Paolo
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1049655&isnumber=22493&punumber=4&k2dockey=1049655@ieeejrns&query=%28+%28%28spirito%29%3Cin%3Eau+%29+%3Cand%3E+%28%28transistor%29%3Cin%3Eti+%29+%29&pos=2&access=no Static and dynamic behaviour of transistors in the avalanche region]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4 IEEE Journal of Solid State Circuits]
Volume = 6
Issue = 2
Year = 1971
Page = 83-87
. A paper pushing further the study of avalanche transistor by a graphical method proposed in the preceding work ("restricted access").
*Harvrefcol
Surname = Spirito
Given = Paolo
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1050518&isnumber=22538&punumber=4&k2dockey=1050518@ieeejrns&query=%28+%28%28spirito%29%3Cin%3Eau+%29+%3Cand%3E+%28%28transistor%29%3Cin%3Eti+%29+%29&pos=4&access=no On the trigger delay of avalanche transistors]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4 IEEE Journal of Solid State Circuits]
Volume = 9
Issue = 5
Year = 1974
Page = 307-309
. A paper analyzing the trigger delay time of avalanche transistors by means of numerical analysis ("restricted access").
*Harvrefcol
Surname1 = Spirito
Given1 = Paolo
Surname2 = Vitale
Given2 = G.F.
Title = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1050310&isnumber=22526&punumber=4&k2dockey=1050310@ieeejrns&query=%28+%28%28spirito%29%3Cin%3Eau+%29+%3Cand%3E+%28%28transistor%29%3Cin%3Eti+%29+%29&pos=5&access=no An analysis of the dynamic behavior of switching circuits using avalanche transistors]
Journal = [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4 IEEE Journal of Solid State Circuits]
Volume = 7
Issue = 4
Year = 1972
Page = 315-320
. A paper where an analytical model of the behavior of an avalanche transistor is derived after suitable approximations ("restricted access").

Applications

*Harvrefcol
Surname1 = Biddle
Given1 = Wade
Surname2 = Lonobile
Given2 = David
Title = [http://www.lle.rochester.edu/pub/review/v73/2_sweep.pdf Sweep Deflection Circuit Development Using Computer-Aided Circuit Design for the OMEGA Multichannel Streak Camera]
Journal = [http://www.lle.rochester.edu/03_publications/03_01_review/03_llereview.html LLE Review]
Volume = 73
Year = 1997
Page = 6-14
. A paper describing a fast sweep generator for a streak camera constructed using series connected avalanche transistor circuits.
*Harvrefcol
Surname = Chaplin
Given = G.B.B.
Chapter = [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1155606&isnumber=25923&punumber=8291&k2dockey=1155606@ieeecnfs&query=%28%28transistor+avalanche+circuits%29%3Cin%3Emetadata%29&pos=0 A method of designing transistor avalanche circuits with application to a sensitive transistor oscilloscope]
Title = IRE [http://ieeexplore.ieee.org/servlet/opac?punumber=8291 Solid-State Circuits Conference] , Volume I
Year = 1958
Page = 21-23
. A paper describing an application of avalanche transistors to the design of a sampling oscilloscope: available abstract, full paper is "restricted access".
*Harvrefcol
Surname1 = Fulkerson
Given1 = E. Stephen
Surname2 = Norman
Given2 = Douglas C.
Surname3 = Booth
Given3 = Rex
Title = [http://www.scienceaccelerator.gov/dsa/resultNavFrameset.html?ssid=-b88956d%3A11a3450b593%3A69b0&requestType=USER&displayMode=RANK&startPosition=0&resultItem=3&resultCount=17&resultId=103643504&ranked=true&index=3&mode=RESULT Report UCRL-JC--125874 - Driving Pockels cells using avalanche transistors]
Publisher = Lawrence Livermore National Laboratory
Year = 1997, May 28
. Available from [http://www.osti.gov/ the U.S. Department of Energy Office of Scientific & Technical Information] . A report describing the design of a driver for Pockels cells Q-switches.
*Harvrefcol
Surname = Holme
Given = Andrew
Title = [http://www.holmea.demon.co.uk/Avalanche/Avalanche.htm Avalanche transistor pulse generator]
Accessed = 23/04/2008
Year = 2006
. A project of an avalanche transistor astable multivibrator with schematics, waveforms and photos of the layout.
*Harvrefcol
Surname = Kilpelä
Given = Ari
Title = [http://herkules.oulu.fi/isbn9514272625/ Pulsed time-of-flight laser range finder techniques for fast, high precision measurement applications]
Journal = [http://herkules.oulu.fi/issn03553213/index.html?lang=en Acta Universitatis Ouluensis Technica]
Volume = 197
Year = 2004
, Academic Dissertation presented with the assent of the Faculty of Technology, University of Oulu, ISBN 951-42-7261-7. A doctoral dissertation describing a Laser TOF ("Time Of Flight") Radar and its construction using an avalanche transistor pulser.
*Harvrefcol
Surname1 = Kilpelä
Given1 = Ari
Surname2 = Kostamovaara
Given2 = Juha
Title = [http://scitation.aip.org/vsearch/servlet/VerityServlet?KEY=RSINAK&ONLINE=YES&smode=strresults&sort=chron&maxdisp=25&threshold=0&possible1zone=article&possible4=Kilpela&possible4zone=author&bool4=and&OUTLOG=NO&viewabs=RSINAK&key=DISPLAY&docID=5&page=1&chapter=0 Laser pulser for a time-of-flight laser radar]
Journal = [http://rsi.aip.org/rsi Review of Scientific Instruments]
Publisher = [http://www.aip.org The American Institute of Physics]
Volume =68
Issue = 6
Page = 2253-2258
Year = 1997
(preprint version [http://www.ee.oulu.fi/~arik/Pulse.pdf here] ). A paper describing an avalanche transistor pulser and its use as Laser driver in a TOF ("Time Of Flight") LASER RADAR.
* [http://www.nxp.com/models/bi_models/mextram/ NXP Mextram home page] A very rich repository of documents about the Mextram bipolar junction transistor SPICE model, capable of avalanche breakdown behavior simulation.
*" [http://catalog.osram-os.com/media/_en/Graphics/00018291_0.pdf Operating the pulsed laser diode SPL LLxx] ", " [http://catalog.osram-os.com/media/_en/Graphics/00018297_0.pdf Range finding using pulsed laser diodes] " OSRAM Opto Semiconductors GmbH Application Notes, 2004-09-10. Two application notes from Osram Opto Semiconductors describing pulsed operation of a Laser diode, using avalanche transistors and other kind of drivers.
*Harvrefcol
Surname = Pellegrin
Given = J.L.
Title = [http://www.slac.stanford.edu/pubs/slacpubs/0000/slac-pub-0669.html SLAC-PUB-0669 - Increasing the Stability of Series Avalanche Transistor Circuits]
Publisher = [http://www.slac.stanford.edu/ Stanford Linear Accelerator Center - SLAC]
Year =1969, September
. A paper describing a method to enhance performances of banks of seies-connected avalanche transistor circuits.
*Harvrefcol
Surname = Williams
Given = Jim
Title = [http://www.edn.com/article/CA323017.html The taming of the slew] ,(.pdf copy [http://www.edn.com/contents/images/323017.pdf here] )
Journal = [http://www.edn.com EDN Magazine]
Page = 57-65
Issue = 25 September
Year = 2003
A detailed paper describing the construction and performance of an avalanche transistor pre-trigger pulse generator to test the slew-rate of very fast operational amplifiers. Also appeared under the title " [http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1154,D4183 Slew Rate Verification for Wideband Amplifiers - The Taming of the Slew] ", application note AN94, Linear Technology, May 2003. See also, from the same author, Linear Technology application note AN47, " [http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1154,C1009,C1028,P1219,D4138 High speed amplifier techniques] ", August 1991, where an astable circuit similar to that described by Holme is detailed in appendix D, pages 93-95.

Varia

*Russel Jacob Baker [http://cmosedu.com/jbaker/jbaker.htm Academic Web Page] at Boise State University. A contributor to the theory and applications of avalanche transistors.
* [http://www.spek.keytown.com/rasIIIProg/5_tvorch/Voc%602000/bib_spis/liste/diakonov.htm Владимир Павлович Дьяконов (Vladimir Pavlovich D'yakonov)] (in Russian). Some biographical notes about one of the leading contributors to the theory and application of avalanche transistors.
*Ari Kilpelä [http://www.ee.oulu.fi/~arik/index.html Academic Web Page] at the University of Oulu. A researcher working on theory and applications of avalanche transistor circuits.
*Paolo Spirito [http://www.docenti.unina.it/docenti/web/index.php?id_prof=25 Academic Web Page] at University of Naples Federico II. One of the leading contributor to the theory of avalanche transistors and avalanche process in semiconductors.


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