- Digital video testing
Digital video testing in
broadcast video, for example, is the process of validating and verifying that the video content and other data is being correctly processed, stored and transported. Despite the fact that the data is digital, most digital tv(DTV) system testing relies on analog means and equipment. This is done for operator familiarity and convenience. Video may be digital but it originates from cameras, film, and computers. The main difference is that the analog video is converted early in the chain into digital or numeric representation. Since many picture parameters have basically the same meaning, differing only as analog and digital representations, it is natural to convert the digital data into analog format for many testing functions and for direct viewing.
As video content migrates from analog to digital format, the delivery mechanism, for both old and new formats, has changed as communication networks move toward a packet-based infrastructure. So, in addition to new digital compression streams entering the network (
MPEG-2and MPEG-4) there are new network protocols to implement and verify in order to guarantee quality. Furthermore, the new compression technology H.264offers around twice the compression efficiency of MPEG-2, although the processing complexity is increased significantly. Extensions to the MPEG-2 standard to incorporate H.264, as an additional elementary streamtype within an MPEG-2 transport stream, have made it profitable to broadcasters and network operators.
Digital video (HDTV) basics
HDTVdata transmission illustrates the benefits of BIST. HDTV employs serial data rates of1.483 Gbit/s and 1.485 Gbit/s and parallel data rates up to 74.25 MHz. These operating data rates by themselvesdo not present an insurmountable test challenge. However, there are other complicating factors likethe polynomial scrambling and transition minimization techniques used in the data encoding and decodingprocess. Done to benefit physical layer transmission, this encoding makes direct validation between originalunencoded parallel data and encoded transmitted serial data difficult without use of external discrete testinstruments. Native codeBIST can remove some of the burden of reliance on external test equipment forreliable HDTV system testing.
For these devices, an
algorithmicmeans was developed to produce the DTV data which reduces data storage.The size of the data for one frame of a typical HDTV picture is about 10M-words of 10-bit length. Videosystem test data is normally a static picture such as color bars, a luminance sweep or a system stressing function such as a pathological. This test data set models the picture data conditions to determine the operational readiness, and test the robustness of DTV data systems.
The data is a regular sequence of words or samples from two channels,
chrominance(C) and luminance(Y), which forms the active picture. These samples are interleavedand control sequences such as Start-of-Active-Video (SAV), End-of-Active-Video (EAV), Line Numbers (LN) and Error Detection Codes (CRC) are inserted.Industry documents like SMPTE RP178 define test data specifically for the purpose of stressing criticalfunctions of the data transmission chain like the clock-data recovery function and PLL of the deserializer.The test data is usually applied as a diagnostic for equipment that is out of service. The standards alsodefine specific diagnostic and detection methods that work together with the data. Since DTV does notuse error correction in serial data transmission, the diagnostics are used to identify elements in the dataprocessing chain that may be contributing to degraded picture or transmission quality. By adopting thesemethods on-chip ( embedded system), an effective self-diagnostic ( Built-in self-testBIST, Design For Test) capability is gained that is simple to extend to the system level.
The test equipment needed to test and monitor a DTV system includes, but is not limited to:
signal generator, video analyzer; waveform monitor; picture monitor; MPEG Analyzers; MPEG Generators; MPEG Monitors; Digital Video Quality Analyzer; TV Test Transmitter; and Content Verification. Oscilloscopesare also useful for troubleshooting and viewing the signals.
The generator provides a set of standardized test signals and test patterns having precisely controlled signalcharacteristics like signal amplitudes, data and formats. These test signals are commonly the digital representations of traditional analog test signals such as color bars, luminance sweeps and sine-squared pulse and bar.For the unique test situations associated with digital video data systems, other test patterns have been addedsuch as the equalizer and
PLLpathological stressing patterns. Signal amplitudes and other characteristics are prescribed in the SMPTEor ITU-R standards. The digital transport signals are based on Emitter-coupled logic(ECL) levels of 800 mV p-p and risetimes of 400 ps to 1.5 ns (SD) and <270 ps (HD). The transport system electrical impedanceis 75 ohms.
ignal and data analysis
Analog video systems tend to degrade gracefully in linear fashion to the point where the degradationbecomes noticeable in the picture and sound. Digital systems, on the other hand, tend to be robust up tothe point of failure where errors become visible or audible. These considerations have produced the videoanalyzer that bridges both analog and digital domains. The video analyzer performs the more traditionalfunction of a waveform monitor and the added function of a data analyzer. These instruments monitorthe signal and indicate signs of degradation. They also provide a means of viewing the digital data itself.The video system, whether analog or digital, is a unity-gain signal environment. This allows design ofsystems for optimum
signal-to-noiseperformance and simple interfacing of signal sources and receivers.Maintaining the correct amplitude level of the digital transport signal that is, in fact, a series of analogvoltage changes, is vital to being able to receive that signal across the transport layer which is also analog.
The video analyzer acts as a specialized oscilloscope to allow viewing the transport signal and to measureits amplitude, amplitude
overshoot, rise time, fall time, jitter, data unit interval and other parameters. In doing these functions, the analyzer employs a representation of overlapping high and low data intervals called an eye diagram. Some analyzers include synchronizing functions to the digital data that permit identification of errors originating in specific portions of the picture.
Analyzers may also have analog conversion tools such as vector displays. These permit the interpretation of the digital
luminanceand chrominancedata in terms of their equivalent analog levels and timing.
Eye pattern testing
eye patternis an oscilloscope display of the analog digital data transport signal. The parameters normally measured by the eye pattern display are signal amplitude, risetime and overshoot. The receiving system must reliably detect the signal high and low levels to give error-free real-time measurements. The eye pattern is measured and displayed as received without equalization and hence, is usually made near the signal source to avoid noise and frequency rolloff.
The unit interval (UI) is the time between two adjacent signal transitions. The time is the reciprocal of thetransport
clock frequency. One UI for SMPTE 259Mis 3.7 ns and for SMPTE 292Mis 673.4 ps. Serialreceivers detect signal polarity near the center of the eye where noise and jitter effects are minimized.
Testing attempts to reveal any defects of the received signal that close the eye. Since very low error rates are needed for correct SDV transmission, the eye opening should be as large and clean after equalization aspossible under the applicable standard. The amount of jitter allowed in SDV systems is 0.2 UI, 740 ps forSD and 134.6 ps for HD. Though most systems are designed with enough margin to operate reliably withlarger amounts of jitter, there is a point where failure occurs. Keeping jitter to a minimum is important forsystem reliability.
Signal amplitude is monitored to assure that there is sufficient transmitted amplitude so that the equalizerwill respond correctly to the received level. The rise time and fall time are monitored at the 20% and 80%levels. Incorrect transition times can indicate signal distortion, ringing or overshoot if too fast, or eye closure if too slow. Overshoot can be the byproduct of fast transition times but more often indicates poor
electrical terminationor transmission system impedance discontinuities.
Digital stress testing
Digital systemstend to be robust right up until they fail. Unfortunately, there are no viable in-service tests that will measure the available margin in the digital system. In order to assess the available margins, the equipment must be taken off line. The amount of change needed to produce a particular failure is the measure of the margin. The simplest type of stress testing that can be done on an SDV system is by adding cable until errors are produced. Other means would be to change signal amplitude or rise time, or add noise or jitter to the transport signal. These tests challenge the receiver characteristics, especially the cable equalizer and reclocker. There is ample evidence to support the results obtained by cable length testing when done using one or more of the stressing data patterns (pathologicals). The pathological test patterns are usually combined into a single pattern as described in SMPTE RP 178 for SD or RP 198 for HD.
Cable length stress tests can be easily performed using actual video
coaxial cable. The most importantparameter to be measured is the point where the system crashes. From there, adding or removing smallincrements of cable will determine the characteristic of the error curve.
Serial Digital Interface(SDI) check field or pathological signal is a full-field signal. Testing using this signal is done on equipment that is not in service. The two component data portions of the check field are designed to stress the cable equalizer and the PLL. The equalizer stress test data consists of a sequence of 19-bit intervals of one polarity followed by a single-bit interval of the opposite polarity. The pattern persists for the duration of the video line. This data pattern produces a large DC component that stresses the analog signal handling capability of the receiver and transmission system. When viewed, the picture produced is a shade of mauve or purple.
The PLL stressing function consists of a signal having 20-bit intervals of one polarity followed by 20 of theopposite polarity. This produces a minimum number of transitions that are used by the receiving system PLLfor transport clock extraction. The displayed color is a dark grey. The SDI check field is a legal test signal only for component digital and not for composite digital video systems.
EDH-CRC error testing
For high-definition systems a
cyclic redundancy check(CRC) system is used to mark error occurrence.Each video line has a CRC inserted at its end by the transmitter. The receiver checks the CRC and canreport any errors to a host or maintenance system. Standard-definition systems can use an error reporting system called Error Detection and Handling(EDH). Operation of this method is covered in detail in SMPTE RP 165. This system compiles CRC information for specific portions of active picture, full field and ancillary data parts of the video signal. The CRCs are contained in an ancillary data packet inserted in a specific location in the vertical switching interval. Jittertesting
The transport clock is encoded with the data in SDV systems. This clock must be recovered by the receivingsystem. This must also be done by the SDV test system analyzer if it is to measure the signal parameters.A PLL is commonly used to detect and lock to transitions in the data stream. Several methods have beenproposed to recover the transport clock for use as a test reference. These methods are covered in SMPTERP 192. Specifics relating to jitter in bit-serial digital video systems are discussed in RP 184. There are two classes of jitter that are important in SDV systems: timing jitter and alignment jitter.
Timing jitter is the deviation from the ideal timing of significant instances of the digital signal, such as zerocrossings, relative to an ideal, jitter-free clock and above some low frequency (usually 10 Hz). Usually the measurement system generates a clock that has been heavily filtered to reduce its intrinsic jitter components. Alignment jitter (also called relative jitter) is the deviation in time of the significant instants of the digital signal relative to a hypothetical clock recovered from the data signal itself. This recovered clock should track the signal up to the extent of its upper clock recovery bandwidth, typically in the region of about 1 kHz to 100 kHz. Alignment jitter measurement includes jitter terms above this frequency. Alignment jitter is an indicator of the degradation of signal-to-latch clock timing margin.
Built-in self-test (BIST)
Functional verificationpresents significant challenges both in development testing, production testing and system-application testing. The baseband broadcast digital video data environment is complex and can benefit from built-in testability ( design for test). Extending the concept of self-testability into the realm of the target application enhances the product and adds value to its role in the system application.
Internal test pattern generator (TPG) produces four test patterns for each supported SD and/or HD, NTSC and PAL format: a 75%, eight-vertical-color-bar pattern; a full-field equalizer pathological; a full-field PLL pathological and a full-field black raster. The CRC or EDH circuitry computes check words as the data is applied to the internal circuits of the device. These check words are compared to pre-stored values at the conclusion of the test interval to determine if the device is functioning correctly. The entire system including the CRC or EDH circuitry and the pre-stored check words is thereby self-testing. If any part of the process or data does not agree or produce the desired result, there is a fault in the device. The output of the TPG is available for use in system-level testing. The TPG can also serve as a basic stand-alone generator in a variety of
The BIST/TPG core achieves the primary objective of producing and checking the data for errors under fulloperational conditions. Sub-systems used for normal device operation, such as the CRC generator/checkerand EDH system, are integral parts of the BIST function.
An important function for a multi-standard DTV serializer or deserializer is having the ability to automatically determine the format of the data as standard- or high-definition. Having this capability facilitates the creation of complete frames of test data in any supported SD or HD format. The BIST/TPG process uses the auto-format detection to control and track the data creation and error checking process.
The standard approach to video system testing usually uses test signals routed to and from centrally located test instruments using a dedicated distribution system consisting of coaxial cable, patch fields and distribution amplifiers. Test signals, such as color bars or reference black raster, are almost universally distributed within the TV plant. It is normal to test signal paths for proper operation before they are used for program transmission while the equipment is not in service.
By adding test pattern generation and checking to a switcher or router can make BIST/TPG a low cost addition to the particular piece of distribution equipment or entire system. BIST/TPG can also be added at low cost and as a performance and convenience option to video signal origination equipment such as a camera,
VTR, or telecine.
References and external links
*International Engineering Consortium - Testing Digital Video (Tutorial pdf) [http://www.iec.org/online/tutorials/test_dv/]
*Video test equipment - Tek [http://www.tek.com/products/video_test/]
*Video test equipment - Rohde & Schwarz [http://www2.rohde-schwarz.com/en/products/broadcasting/product_categories/broadcasting_measurement/broadcasting_tm/]
*National Semiconductor - Broadcast video [http://www.national.com/analog/interface/sdi]
*Video Testing for Broadcasters [http://www.videoclarity.com/WPBroadcastTesting.html]
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