RF microwave CAE CAD

RF microwave CAE CAD is computer-aided design (CAD) using computer technology to aid in the design, modeling, and simulation of an RF or microwave product. It is a visual and symbol-based method of communication whose conventions are particular to RF/microwave engineering.

History

The era of RF microwave CAE (computer-aided engineering) CAD (computer-aided design) began with elaborate analytically based models of microwave components and simple computer-aided techniques connecting linear component models to obtain the responses of linear microwave circuits. Development has become rapid with computer-oriented microwave practices addressing complex geometries and with the ability to globally model and optimize large circuits. The pursuit of accurate models of active devices and of passive components continues to be a key activity.

Scope of design

RF and microwave circuit design and simulation software for the electronic design automation (EDA) marketplace includes but not limited to circuit simulation, analysis, schematic capture, and integrated design environment for synthesis tools which automate the design of HF (high frequency) circuits from RF to microwave to millimeter waves. Physical modeling of stripline and microstrip for transmission lines. A wide range of applications are possible, from analog sub-circuit design to RF circuit design for complex wireless communications systems.

Scope of modeling

There are a vast number of device or component types which can be simulated in computer aided design software. Generally, the degree of complexity for modeling depends on the software package and the synthesis of off-the-shelf models and application-specific custom models. The component types can be categorized as follows: amplifiers, antennas, attenuators, cabling, capacitors, circulators, combiners, couplers, connectors, dc blocks, delay lines, detectors, diodes, dividers, ferrites, filters, inductors, isolators, limiters, mixers, oscillators, phase shifters, resistors, rotary joints, switches, transistors, terminators, and waveguides.

Software packages (as of Aug 08)

ACCEL FPGA 1.7.0007; Accelerated Designs UltraLibrarian Gold 2.0.82; Actel CoreConsole 1.3; Actel Designer 8.0 Linux; Actel Designer 8.1 SP2; Actel Libero IDE V8.0 SP1; Agilent 89600 Series Vector Signal Analyzer 8.0; Agilent Advanced Design System (ADS) 2008; Agilent Advanced Design System 2008 Linux; Agilent Advanced Design System ADS 2006A Linux UPDATE1; Agilent GENESYS 2007.08; Agilent GENESYS and SystemVue 2007.03; Agilent RF Design Environment (RFDE) 2005a; Agilent SystemVue 2006.04; Aldec Active HDL 7.2; Aldec Riviera 2007 02 LiNUX; Aldec Riviera 2007.02 LiNUX64; Aldec Riviera 2007.06 WinNT2kXP; Altera Dsp builder 7.2 SP2; Altera Megacore IP Library 7.2 SP2; Altera Modelsim 6.1g_SP2; Altera Nios II EDS 7.2 SP2; Altera QUARTUS II 7.2 SP2; Altera QuartusII 6.1 Linux; Altium Designer 6.8; Altium P-CAD2006 With SP1; Ansoft Designer v3.5; Ansoft EPhysics 1.0; Ansoft HFSS 11.0; Ansoft Links 3.0; Ansoft Maxwell RMxprt.v11.1; Ansoft NSEMBLE 8.0; Ansoft OPTIMETRICS 2.5; Ansoft PExprt 6.0 SP5; Ansoft Q3D Extractor 7.0; Ansoft RMXPRT 5.0; Ansoft SERENADE DESIGN ENVIRONMENT V8.71; Ansoft SIMPLORER 7.0.5; Ansoft SIwave v3.0; Ansoft Spicelink 5.0; Ansoft Turbo Package Analyzer (TPA); Apollo Photonic Solutions Suite v2.2; ARM Developer Suite v1.2(ADS); ARM RealView Developer Suite v2.2; AutoTRAX EDA 9.20 ; AutoVue Electro-Mechanical Pro v19.2; AWR Design Environment 7.03.3162.2; AWR Testwave for AWRDE 2.04; AWR Microwave Office Version 2008; B2 Spice AD 5.1.8; Baas Electronics Layo1 PCB Design Pro 10.0; BluePrint-PCB 1.8; LochMaster 3.0; LPKF CircuitCAM 5.0 Build 618; magma blast 4.2 20040729; MemResearch EM3DS 8.0 2006; MEMSCAP MEMS PRO V4.0; Mentor Graphics Adit 2006.2; Mentor Graphics ADTB 2.0 Linux; Mentor Graphics AMS 2006.2b Linux; Mentor Graphics AMS 2007.2 Win; Mentor Graphics Board Station Flow 2004 Spac5; Mentor Graphics Board Station XE Flow 2006; Mentor Graphics BST 2004 Spac5 Linux; Mentor Graphics Calibre 2007.1_25 Linux; Mentor Graphics Capital Capture 2005; Mentor Graphics Capital Harness Systems 2006.2; Mentor Graphics Capital Harness Systems 2006.2 Linux; Mentor Graphics Capital Harness Systems 2006.2 Solaris; Mentor Graphics Catapult C Synthesis 2006b.70.Linux; Mentor Graphics Catapult Synthesis 2007a update1; Mentor Graphics Design Capture-Expedition 2007.1; Mentor Graphics DesignAnalyst 2005.1; Mentor Graphics Design-For-Test(DFT) 2006.3.10; Mentor Graphics DMS V2005; Mentor Graphics DMS V2005 Linux; Mentor Graphics DxDesigner 2006; Mentor Graphics DxDesigner 2006 Linux ; Mentor Graphics DxDesigner Expedition Enterprise 2007.1; Mentor Graphics EDGE SimTest 2006.12; Mentor Graphics EXP 2005 Linux; Mentor Graphics EXP 2005 Spac1; Mentor Graphics Expedition Suite 2005; Mentor Graphics FormalPro 2006.1_1-3 Linux; Mentor Graphics FPGA Advantage 7.3; Mentor Graphics FPGA Advantage 7.3 linux; Mentor Graphics FPGA Advantage with Precision Synthesis 7.3; Mentor Graphics HDL Designer 2005.3 Linux; Mentor Graphics HDL Designer Series 2006.1; Mentor Graphics HyperLynx 7.7; Mentor Graphics IC Flow 2006.2 Linux; Mentor Graphics ICX Tau 3.7; Mentor Graphics IND 2005; MENTOR GRAPHICS ISD2004 Spac4; Mentor Graphics LeonardoSpectrum V2005a.82; Mentor Graphics ModelSim SE 6.2b; Mentor Graphics ModelSim SE 6.2b Linux; Mentor Graphics ModelSim SE 6.3; Mentor Graphics ModelSim SE 6.3 Linux; Mentor Graphics PADS 2007.1; Mentor Graphics PADS2005 SPac3; Mentor Graphics Precision Synthesis 2006a.92 linux; Mentor Graphics Precision Synthesis 2007a.8; Mentor Graphics QuestaSim SE 6.2b; Mentor Graphics QuestaSim SE 6.2b Linux; Mentor Graphics QuestaSim SE 6.3; Mentor Graphics QuestaSim SE 6.3 Linux; Mentor Graphics Seamless; Mentor Graphics Seamless FPGA v5.4.3.0; Mentor Graphics SystemVision 4.4 2006.2; Mician Microwave Wizard 5.6; Microwave Office 2007 AWR Design Environment 7.51.3650.1; ModelSim Xilinx Edition III 6.0a; NASSDA CRITIC 5.0.01.2005; NASSDA HANEX 5.0.01.2005; NASSDA HSIM 5.0.01.2005; Nuhertz Filter Solutions 2006 v11.0; Nuhertz Filters 4.1.3; OMEGA 2.1.0; Pathloss 4.0; Pcaad 5; PCSchematic 10; POLAR INSTRUMENTS SB200 V2.1; Polar Instruments SI8000m 6.1.0; Polar Instruments SI9000 7.1.0; POLAR SB200A Pro V2.0; Polar SB200A StackUp Builder 6.1; POLAR SB200A StackUp Viewer 6.1; POLAR SI8000 V6.0; POLAR SI9000E 7.00; Powersim Studio 2005.6.00; POYNTING SuperNEC v2.9; PRECIENCE PCB Navigator 5.1; Proteus Professional 7.2 SP0; Pscad 4.2; PSIM 6.0; PSOC DESIGNER V4.3; PTC InterComm EDAconduit 2.10.F000; PTC InterComm Expert 5.1 M070; Pulsonix 4.6; QNX Momentics Development Suite Professional v6.3; Quicklogic Quickworks 9.7; QUICKLOGIC QUICKWORKS 9.8.4; RemCom XFDTD Bio-Pro 6.3.8.4 Win2kXP; RENESAS CC32R 4.30; RENESAS HIGH-PERFORMANCE EMBEDDED WORKSHOP 3.1; RENESAS NC308WA 5.20; RENESAS NC30WA 5.30; RSI CAMCAD PRO 4.4.024; RSLogix5000 Firmware KIT 12.01; RTI ScopeTools v5.1 for VxWorks v6.0; Sandwork SPICE Explorer 2007.1; Sandwork SPICE Explorer 2007.3 Linux; SB200 StackUp Builder 6.2; SB200 StackUp Viewer 6.2; SEMCAD 1.8; Sigrity SpeedXP 7.0; Sigrity SpeedXp Suite 2003.09.02; SIMetrix SIMPLIS 5.3; Sonnet Suite pro 11.52; Sonnet Suite Pro 9.5.2; Spectrum MicroCAP 8.1.1; Spectrum Micro-cap 9.0; Summit Design Visual Elite 2006.1.1; Summit System Architect 2006.08.17 Linux; Summit System Architect 2006.08.17 WIN; SynaptiCAD AllProducts 12.07b; SynaptiCAD AllProducts 12.09b Linux; Synopsys Astro 2006.06.SP5 Linux; Synopsys Astro 2007.03 Linux; Synopsys Astro Interactive Ultra 2006.06.SP5; Synopsys Astro Interactive Ultra 2007.03.SP1 Linux; Synopsys Astro Rail 2006.06.SP5; Synopsys Astro Rail 2007.03 SP1 Linux; Synopsys Aurora 2006.09 Linux ; Synopsys Aurora 2007.03 Linux; Synopsys Cadabra 2007.03 Linux; Synopsys Circuit Explorer 2006.03 Linux; Synopsys CoCentric System Studio 2006.12 SP1 Linux (CSS); Synopsys CoCentric System Studio(CSS) 2006.03-SP2 Linux; Synopsys CoreTools for IP Reuse Tools 2006.03.SP3; Synopsys CoreTools For IP Reuse Tools 2007.03 Linux; Synopsys Cosmos-Scope 2007.03 Linux; Synopsys Cosmos-Scope 2007.03 SP1 Win; Synopsys CosmosScope X2006 03 Win; Synopsys DC-FPGA 2005.09.1 Linux FPGA; Synopsys Design Compiler 2007.03 Linux; Synopsys Design Compiler 2007.03 SP1; Synopsys Design Compiler 2007.03 SP2 Linux; Synopsys DesignWare.vip Smartmodels 2005.09 ; Synopsys Formality 2006.12 SP3; Synopsys Formality 2007.06 Linux; Synopsys FPGA Compiler-II 3.8; Synopsys Hercules 2004.12sp3-8 Linux ; Synopsys Hsim plus 2006.06.SP1 Linux; Synopsys Hsim plus 2006.06.SP1 Win; Synopsys Hsim plus 2007.03 Linux; Synopsys Hsim plus 2007.03 Win; Synopsys Hspice 2007.09 Linux; Synopsys hspice 2007.12 Win; Synopsys Hspice vY 2006.09.SP1 Linux ; Synopsys Hspice vY 2006.09.SP1 Win ; Synopsys IC Compiler 2007.03 Linux; Synopsys IC Compiler 2007.03 SP2 Linux; Synopsys IC Workbench PLUS 2007.03 Linux; Synopsys ISE TCAD 10.0 ; Synopsys JupiterXT 2006.06.SP4 Linux; Synopsys JupiterXT 2007.03 SP1 Linux; Synopsys Leda 2006.06 Linux; Synopsys Milkyway 2006.06.SP4 Linux ; Synopsys Nanochar 2006.12 SP1 ; Synopsys NanoSim 2006.06 ; Synopsys NanoTime 2006.12 SP2 Linux ; Synopsys Pathmill 2006.12 Linux ; Synopsys Pioneer-NTB SystemVerilog Testbench 2006.06 Linux; Synopsys PrimePower 2006.06.SP1 Linux ; Synopsys PrimeRail 2006.06 Linux ; Synopsys PrimeRail 2007.03 Linux ; Synopsys PrimeTime 2006.12 SP2 Linux; Synopsys Raphael 2006.12 Linux; Synopsys Raphael NXT 2006.12 SP1 Linux; Synopsys Sentaurus Tcad 2007.03 Linux ; Synopsys Sold 2007.03; Synopsys Star-RCXT 2006.12.SP1 3; Synopsys Tcad Taurus Medici 2006.06; Synopsys Tcad Taurus Medici 2007.03 Linux; Synopsys Tcad Taurus Tsuprem4 2006.06 SP1 Linux; Synopsys Tcad Taurus Tsuprem4 2006.06.SP1; Synopsys TetraMAX 2007 03 SP1 Linux; Synopsys TetraMAX Overlay with Synthesis 2006.06.SP5; Synopsys TetraMAX StandAlone With IDQ 2006.06.SP5 ; Synopsys VCS (verilog compiled simulator) 2006.06 Linux ; Synopsys VCS MX 2006.06 Linux RTL; Synopsys Vera 2006.12 Linux ; Synopsys Virtio innovator 2007.06; Synplicity Certify 8.8.0.4; Synplicity Synplify DSP 3.41; Synplicity Synplify Pro 9.0.1 Linux; Synplify Premier 9.02 with Identify 2.5; SystemView 2005; Teraform; Ti Code Composer Studio 3.1 For All Ti DSP; Tina Pro 7.0; TI-Nspire.

References

#"Computer-aided design of RF and microwave circuits and systems", Microwave Theory and Techniques, IEEE Transactions.
#"The current state of CAD - a users' perspective", Microwave Engineering Europe Magazine. [http://www.mwee.com/magazine/1999/cad.html]