Motorola 6809

1 MHz Motorola 6809P processor, manufactured in 1983.

The Motorola 6809 is an 8-bit (with some 16-bit features) microprocessor CPU from Motorola, designed by Terry Ritter and Joel Boney and introduced 1978. It was a major advance over both its predecessor, the Motorola 6800, and the related MOS Technology 6502.

Description

6809 programming model, showing the processor registers.

Among the significant enhancements introduced in the 6809 were the use of two 8-bit accumulators (A and B, which could be combined into a single 16-bit register, D), two 16-bit index registers (X, Y) and two 16-bit stack pointers. The index and stack registers allowed very advanced addressing modes. Program counter relative addressing allowed for the easy creation of position-independent code, while a user stack pointer (U) facilitated the creation of reentrant code.

The 6809 was source-compatible with the 6800, though the 6800 had 78 instructions to the 6809's 59. Some instructions were replaced by more general ones which the assembler translated into equivalent operations and some were even replaced by addressing modes. The instruction set and register complement were highly orthogonal, making the 6809 easier to program than the 6800 or 6502.

Other features were one of the first hardware-implementations of a multiplication instruction in an MPU, full 16-bit arithmetic, and an especially fast interrupt system. The 6809 was also highly optimized, up to five times faster than the 6800 series CPUs^{[citation needed]}. Like the 6800, it included an undocumented address bus test instruction with the nickname Halt and Catch Fire (HCF)^{[citation needed]}.

The 6809's state machine and control logic, unlike many processors of the day, was mostly implemented using a large PLA and asynchronous random logic (a trait of early designs and, partly, of RISC) rather than microcoded. The 6809 used the two-phase clock cycle directly as the basic machine cycle.

Although this means fewer clock cycles per instruction compared to the Z80, for instance, the latter's higher resolution state machine allowed clock frequencies 3-5 times as high without demanding faster memory chips, which was often the limiting factor. This is because the Z80 combines two full (but short) clock cycles into a relatively long memory access period compared to the clock, while the more asynchronous 6809 instead has relatively short memory access times: depending on version and speed grade, approximately 60% of a single clock cycle was typically available for memory access in a 6809 (see data sheets).

The 6809 had an internal two-phase clock generator (needing only an external crystal) whereas the 6809E needed an external clock generator. There were also variants such as the 68A09(E) and 68B09(E); the internal letter indicates the processor's rated clock speed.

History

The Motorola 6809 was originally produced in 1 MHz, 1.5 MHz (68A09) and 2 MHz (68B09) speed ratings. Faster versions were produced later by Hitachi. It is sometimes considered to be the conceptual precursor of the Motorola 68000 family of processors, though this is mostly a misunderstanding. The 6809 and 68000 design projects ran partly in parallel and have quite differing architectures as well as radically different implementation principles. However, there is a certain amount of design philosophy similarity (e.g., considerable orthogonality and flexible addressing modes), some assembly language syntax resemblance, as well as opcode mnemonic similarity, but the 6809 is a derivative of the 6800 whereas the 68000 was a totally new design. An 8-bit data bus version of the 68000 (i.e., the 68008) was intended for use in future 8-bit designs. In that respect, the 6809 was rather quickly an evolutionary dead-end.

The 6809 design team believed that future system integrators would look to off-the-shelf code in ROMs to handle common tasks. An example of this might be binary floating point arithmetic, which is a common requirement in many systems. In order to speed time to market, common code modules would be purchased, rather than developed in-house, and integrated into systems with code from other manufacturers. Since a CPU designer could hardly guarantee where this code would be located in a future system, the 6809 design focused heavily on support of position-independent, reentrant code that could be freely located anywhere in the memory map. This expectation was, in reality, never quite met: Motorola's only released example of a ROM'd software module was the MC6839 floating-point ROM. However, the decisions made by the design team made for a very powerful processor and made possible advanced operating systems like OS-9 and UniFlex, which took advantage of the position-independent, re-entrant nature of the 6809 to create multi-user multitasking operating systems.

The 6809 was used in Commodore's dual-CPU SuperPET computer, and, in its 68A09 incarnation, in the unique vector graphics based Vectrex home video game console with built-in screen display. The 6809E was used in the TRS-80 Color Computer (CoCo), the Acorn System 2, 3 and 4 computers (as an optional alternative to their standard 6502), the Fujitsu FM-7, the Welsh-made Dragon 32/64 home computers (clones of the CoCo), and the SWTPC, Gimix, Smoke Signal Broadcasting, etc. SS-50 Bus bus systems, in addition to several of Motorola's own EXORmacs and EXORset development systems. In France, Thomson micro-informatique produced a series of micro-computers based on the 6809E (TO7, TO7/70, TO8, TO8D, TO9, TO9Plus, MO5, MO6, MO5E and MO5NR).

In addition to home computers and game consoles, the 6809 was also utilized in a number of arcade games released during the early to mid 1980s. Williams Electronics was an especially prolific user of the processor, which was deployed in arcade hits such as Defender, Joust, Sinistar, and Robotron: 2084. Williams also utilized the processor in many of its solid-state pinball machines; a specialized version of the 6809 CPU formed the core of the successful Williams Pinball Controller.

Software development company Microware developed the original OS-9 operating system (not to be confused with the more recent Mac OS 9) for the 6809, later porting it to the 68000 and i386 series of microprocessors.

Series III of the Fairlight CMI (computer musical instrument) used dual 6809 CPUs and OS9, and also used one 6809 CPU per voice card. The ESQ-1, as well as SQ-80 first music synthesizer workstations from Ensoniq used one 68B09E as their main CPU. The (E) version was used in order to synchronize the microprocessor's clock to the 32 time multiplexed oscillators in the "Q" music chip in those machines.

The Hitachi 6309 was an enhanced version of the 6809 with extra registers and additional instructions, including block move, additional multiply instructions and hardware-implemented division. It was used in unofficially-upgraded CoCo 3 computers and a version of OS-9 was written to take advantages of the 6309's extra features: NitrOS-9.

Hitachi also produced its own 6809-based machines, the MB6890 and later the S1. These were primarily for the Japanese market, but some were exported to and sold in Australia. There the MB6890 was dubbed the "Peach", probably in ironic reference to the popularity of the Apple II. The S1 was notable in that it contained paging hardware extending the 6809's native 64 kilobyte (64×2¹⁰ byte) addressing range to a full 1 megabyte (1×2²⁰ byte) in 4 KB pages. It was similar in this to machines produced by SWTPC, Gimix, and several other suppliers. TSC produced a Unix-like operating system uniFlex which ran only on such machines. OS-9 Level II, also took advantage of such memory management facilities. Most other computers of the time with more than 64 KB of memory addressing were limited to bank switching where much if not all the 64 KB was simply swapped for another section of memory.

Neither Motorola nor Hitachi produce 6809 processors or derivatives any more, despite the 6809 being one of the most powerful general-purpose 8-bit CPUs ever produced. Many of its innovative features have since been copied. 6809 cores are available in VHDL and can be programmed into FPGA and used as an embedded processor with speed ratings up to 40 MHz. Some 6809 opcodes also live on in the Freescale embedded processors.

The very first Macintosh prototype, wire-wrapped by Burrell Smith, contained a 6809.^[1]

Additionally, the 6809 processor was used in the late 1980s through the early 2000s in Motorola Smartnet Trunking Controllers (dubbed the 6809 controller). It was widely accepted as a reliable platform and bulletproof controller, solidifying the processor's use further more.

Notes

1. ^ Hertzfeld, Andy (October 1980). "Good Earth". Folklore.org. http://www.folklore.org/StoryView.py?story=Good_Earth.txt. Retrieved 2009-12-29. 

References

• Ian Powers, "MC6809 microprocessor", Microprocessors, Volume 2, Issue 3, July 1978, Page 162, ISSN 0308-5953, DOI: 10.1016/0308-5953(78)90010-7.
• Leventhal, Lance (1981). 6809 Assembly Language Programming. Osborne/McGraw-Hill. ISBN 0-931988-35-7.
• Warren, Carl D (1980). The MC6809 Cookbook. TAB Books, Inc. ISBN 0-8306-9683-0.
• Ritter, T. and J. Boney. 1979. "A Microprocessor for the Revolution: The 6809."

• "Part 1: Design Philosophy." Byte. 4(1): 14-42. Cover Article.
• "Part 2: "Instruction Set Dead Ends, Old Trails, and Apologies." Byte. 4(2): 32-42.
• "Part 3: Final Thoughts." Byte. 4(3): 46-52

External links

• http://koti.mbnet.fi/~atjs/mc6809/ – Collection of 6809 instructions, emulators, tools, debuggers, disassemblers and assemblers
• The BYTE  6809 Articles (Jan–February 1979) (PDF) – By Terry Ritter and Joel Boney, co-designers of the 6809; BYTE magazine reproductions by tim lindner
• news://comp.sys.m6809 – Usenet newsgroup for 6809 enthusiasts
• 6809 Emulator based on the SWTPC 6809 system
• Instruction set reference for 6809/6309 (PDF) By Chris Lomont

This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.