# Czochralski process

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Czochralski process
The Czochralski process

The Czochralski process is a method of crystal growth used to obtain single crystals of semiconductors (e.g. silicon, germanium and gallium arsenide), metals (e.g. palladium, platinum, silver, gold), salts, and synthetic gemstones. The process is named after Polish scientist Jan Czochralski, who discovered the method in 1916 while investigating the crystallization rates of metals.

The most important application may be the growth of large cylindrical ingots, or boules, of single crystal silicon. Other semiconductors, such as gallium arsenide, can also be grown by this method, although lower defect densities in this case can be obtained using variants of the Bridgman-Stockbarger technique.

## Production of Czochralski silicon

A puller rod with seed crystal for growing single-crystal silicon by the Czochralski process

High-purity, semiconductor-grade silicon (only a few parts per million of impurities) is melted in a crucible, usually made of quartz. Dopant impurity atoms such as boron or phosphorus can be added to the molten silicon in precise amounts to dope the silicon, thus changing it into n-type or p-type silicon. This influences the electronic properties of the silicon. A precisely oriented rod-mounted seed crystal is dipped into the molten silicon. The seed crystal's rod is slowly pulled upwards and rotated simultaneously. By precisely controlling the temperature gradients, rate of pulling and speed of rotation, it is possible to extract a large, single-crystal, cylindrical ingot from the melt. Occurrence of unwanted instabilities in the melt can be avoided by investigating and visualizing the temperature and velocity fields during the crystal growth process.[1] This process is normally performed in an inert atmosphere, such as argon, in an inert chamber, such as quartz.

## Size of crystals

Due to the efficiencies of common wafer specifications, the semiconductor industry has used wafers with standardized dimensions. In the early days, the boules were smaller, only a few inches wide. With advanced technology, high-end device manufacturers use 200 mm and 300 mm diameter wafers. The width is controlled by precise control of the temperature, the speeds of rotation and the speed the seed holder is withdrawn. The crystal ingots from which these wafers are sliced can be up to 2 metres in length, weighing several hundred kilograms. Larger wafers allow improvements in manufacturing efficiency, as more chips can be fabricated on each wafer, so there has been a steady drive to increase silicon wafer sizes. The next step up, 450 mm, is currently scheduled for introduction in 2012.[2] Silicon wafers are typically about 0.2–0.75 mm thick, and can be polished to great flatness for making integrated circuits, or textured for making solar cells.

The process begins when the chamber is heated to approximately 1500 degrees Celsius, melting the silicon. When the silicon is fully melted, a small seed crystal mounted on the end of a rotating shaft is slowly lowered until it just dips below the surface of the molten silicon. The shaft rotates counterclockwise and the crucible rotates clockwise. The rotating rod is then drawn upwards very slowly, allowing a roughly cylindrical boule to be formed. The boule can be from one to two metres, depending on the amount of silicon in the crucible.

The electrical characteristics of the silicon are controlled by adding material like phosphorus or boron to the silicon before it is melted. The added material is called dopant and the process is called doping. This method is also used with semiconductor materials other than silicon, such as gallium arsenide.

Monocrystalline silicon grown by the Czochralski process is the basic material in the production of the large-scale integrated circuit chips used in computers, TVs, cell phones and electronic equipment of all kinds.[3]

## Impurity incorporation

When silicon is grown by the Czochralski method, the melt is contained in a silica (quartz) crucible. During growth, the walls of the crucible dissolve into the melt and Czochralski silicon therefore contains oxygen at a typical concentration of 1018
cm−3
. Oxygen impurities can have beneficial effects. Carefully chosen annealing conditions can allow the formation of oxygen precipitates. These have the effect of trapping unwanted transition metal impurities in a process known as gettering. Additionally, oxygen impurities can improve the mechanical strength of silicon wafers by immobilising any dislocations which may be introduced during device processing. It was experimentally shown in the 1990s that the high oxygen concentration is also beneficial for radiation hardness of silicon particle detectors used in harsh radiation environment (such as CERN's LHC/S-LHC projects).[4][5][6] Therefore, radiation detectors made of Czochralski- and Magnetic Czochralski-silicon are considered to be promising candidates for many future high-energy physics experiments.[7][8] It has also been shown that presence of oxygen in silicon increases impurity trapping during post-implantation annealing processes.[9]

However, oxygen impurities can react with boron in an illuminated environment, such as experienced by solar cells. This results in the formation of an electrically active boron–oxygen complex that detracts from cell performance. Module output drops by approximately 3% during the first few hours of light exposure.[10]

### Mathematical expression of impurity incorporation from melt

The impurity concentration in the solid crystal that results from freezing an incremental amount of volume can be obtained from consideration of the segregation coefficient.[11]

kO: Segregation coefficient
V0: Initial volume
I0: Number of impurities
C0: Impurity concentration in the melt
VL: Volume of the melt
IL: Number of impurities in the melt
CL: Concentration of impurities in the melt
VS: Volume of solid
CS: Concentration of impurities in the solid

During the growth process, volume of melt dV freezes, and there are impurities from the melt that are removed.

$dI = -k_O C_L dV\;$
$dI = - k_O \frac{I_L}{V_O - V_S} dV$
$\int_{I_O}^{I_L} \frac{dI}{I_L} = -k_O \int_{0}^{V_S} \frac{dV}{V_O - V_S}$
$\ln \left ( \frac{I_L}{I_O} \right ) = \ln \left ( 1 - \frac{V_S}{V_O} \right )^{k_O}$
$I_L = I_O \left ( 1 - \frac{V_S}{V_O} \right )^{k_O}$
$C_S = - \frac{dI_L}{dV_S}$
$C_S = C_O k_O (1-f)^{k_o - 1}$
$f = V_S / V_O\;$

## References

1. ^ J. Aleksic et al., Ann. of NY Academy of Sci. 972 (2002) 158.
2. ^ http://www.physorg.com/news129301282.html
3. ^ http://www.bbc.co.uk/dna/h2g2/A912151
4. ^ Z. Li et al., IEEE Trans Nucl. Sci. 39 (6) (1992) 1730
5. ^ A. Ruzin et al., IEEE Trans Nucl. Sci. 46 (5) (1999) 1310
6. ^ G. Lindström et al., Nucl. Instr. and Meth. A 466 (2001) 308 and cited literature therein.
7. ^ CERN RD50 Status Report 2004, CERN-LHCC-2004-031 and LHCC-RD-005 and cited literature therein
8. ^ J. Härkönen et al., Nucl. Instr. and Meth. A 541 (2005)202.
9. ^ A. Polman et al., J. Appl. Phys., Vol. 75, No. 6, 15 March 1994
10. ^ Eikelboom, J.A., Jansen, M.J., 2000. Characteristion of PV modules of new generations; results of tests and simulations. Report ECN-C-00-067, 18.
11. ^ James D. Plummer, Michael D. Deal, and Peter B. Griffin, Silicon VLSI Technology, Prentice Hall, 2000, p. 126-27

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